summaryrefslogtreecommitdiff
path: root/src/dev/alpha
AgeCommit message (Collapse)Author
2010-06-03Act like enabling CPUs is no big deal,Steve Reinhardt
rather than a scary thing that might not work.
2010-04-15tick: rename Clock namespace to SimClockNathan Binkert
2009-09-23arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hhNathan Binkert
2009-05-17includes: sort includes againNathan Binkert
2009-05-17types: Move stuff for global types into src/base/types.hhNathan Binkert
--HG-- rename : src/sim/host.hh => src/base/types.hh
2009-02-01Devices: Add support for legacy fixed IO locations in BARs.Gabe Black
2008-11-02Add in Context IDs to the simulator. From now on, cpuId is almost never used,Lisa Hsu
the primary identifier for a hardware context should be contextId(). The concept of threads within a CPU remains, in the form of threadId() because sometimes you need to know which context within a cpu to manipulate.
2008-10-11Devices: Make the Intel8254Timer device only use pointers to its counters.Gabe Black
2008-10-09eventq: convert all usage of events to use the new API.Nathan Binkert
For now, there is still a single global event queue, but this is necessary for making the steps towards a parallelized m5.
2008-09-27gcc: Add extra parens to quell warnings.Nathan Binkert
Even though we're not incorrect about operator precedence, let's add some parens in some particularly confusing places to placate GCC 4.3 so that we don't have to turn the warning off. Agreed that this is a bit of a pain for those users who get the order of operations correct, but it is likely to prevent bugs in certain cases.
2008-09-10style: Remove non-leading tabs everywhere they shouldn't be. Developers ↵Ali Saidi
should configure their editors to not insert tabs
2008-06-17rename AlphaConsole to AlphaBackdoorNathan Binkert
--HG-- rename : src/dev/alpha/AlphaConsole.py => src/dev/alpha/AlphaBackdoor.py rename : src/dev/alpha/console.cc => src/dev/alpha/backdoor.cc rename : src/dev/alpha/console.hh => src/dev/alpha/backdoor.hh
2008-06-17Rename SimConsole to Terminal since it makes more senseNathan Binkert
--HG-- rename : src/dev/SimConsole.py => src/dev/Terminal.py rename : src/dev/simconsole.cc => src/dev/terminal.cc rename : src/dev/simconsole.hh => src/dev/terminal.hh
2008-06-12Alpha: Get rid of an old include of a non-existant file.Gabe Black
2008-06-12Dev: Seperate the 8254 timer from tsunami and use it in that and the PC.Gabe Black
2008-03-25Devices: Separate out the MC146818 RTC so both Alpha and X86 can use it.Gabe Black
--HG-- extra : convert_revision : 1e7f5185654ed0845678c2169c702d3b977159ed
2008-02-06Make the Event::description() a const functionStephen Hines
--HG-- extra : convert_revision : c7768d54d3f78685e93920069f5485083ca989c0
2007-10-31Traceflags: Add SCons function to created a traceflag instead of having one ↵Ali Saidi
file with them all. --HG-- extra : convert_revision : 427f6bd8f050861ace3bc0d354a1afa5fc8319e6
2007-08-30params: Deprecate old-style constructors; update most SimObject constructors.Miles Kaufmann
SimObjects not yet updated: - Process and subclasses - BaseCPU and subclasses The SimObject(const std::string &name) constructor was removed. Subclasses that still rely on that behavior must call the parent initializer as : SimObject(makeParams(name)) --HG-- extra : convert_revision : d6faddde76e7c3361ebdbd0a7b372a40941c12ed
2007-08-26Merge with headGabe Black
--HG-- extra : convert_revision : cc73b9aaf73e9dacf52f3350fa591e67ca4ccee6
2007-07-26Merge python and x86 changes with cache branchNathan Binkert
--HG-- extra : convert_revision : e06a950964286604274fba81dcca362d75847233
2007-07-23Major changes to how SimObjects are created and initialized. Almost allNathan Binkert
creation and initialization now happens in python. Parameter objects are generated and initialized by python. The .ini file is now solely for debugging purposes and is not used in construction of the objects in any way. --HG-- extra : convert_revision : 7e722873e417cb3d696f2e34c35ff488b7bff4ed
2007-07-14Merge of DPRINTF fixes from head.Steve Reinhardt
--HG-- extra : convert_revision : f99a33b2df6a6c5592856d17d00e73ee83267442
2007-07-14Fix & tweak DPRINTFs for tracediff w/new cache code.Steve Reinhardt
Note that we should *not* print pointer values in DPRINTFs as these needlessly clutter tracediff output. --HG-- extra : convert_revision : 25a448f1b3ac8d453a717a104ad6dc0112fb30bb
2007-06-30Get rid of Packet result field. Error responses areSteve Reinhardt
now encoded in cmd field. --HG-- extra : convert_revision : d67819b7e3ee4b9a5bf08541104de0a89485e90b
2007-05-27Move SimObject python files alongside the C++ and fixNathan Binkert
the SConscript files so that only the objects that are actually available in a given build are compiled in. Remove a bunch of files that aren't used anymore. --HG-- rename : src/python/m5/objects/AlphaTLB.py => src/arch/alpha/AlphaTLB.py rename : src/python/m5/objects/SparcTLB.py => src/arch/sparc/SparcTLB.py rename : src/python/m5/objects/BaseCPU.py => src/cpu/BaseCPU.py rename : src/python/m5/objects/FuncUnit.py => src/cpu/FuncUnit.py rename : src/python/m5/objects/IntrControl.py => src/cpu/IntrControl.py rename : src/python/m5/objects/MemTest.py => src/cpu/memtest/MemTest.py rename : src/python/m5/objects/FUPool.py => src/cpu/o3/FUPool.py rename : src/python/m5/objects/FuncUnitConfig.py => src/cpu/o3/FuncUnitConfig.py rename : src/python/m5/objects/O3CPU.py => src/cpu/o3/O3CPU.py rename : src/python/m5/objects/OzoneCPU.py => src/cpu/ozone/OzoneCPU.py rename : src/python/m5/objects/SimpleOzoneCPU.py => src/cpu/ozone/SimpleOzoneCPU.py rename : src/python/m5/objects/BadDevice.py => src/dev/BadDevice.py rename : src/python/m5/objects/Device.py => src/dev/Device.py rename : src/python/m5/objects/DiskImage.py => src/dev/DiskImage.py rename : src/python/m5/objects/Ethernet.py => src/dev/Ethernet.py rename : src/python/m5/objects/Ide.py => src/dev/Ide.py rename : src/python/m5/objects/Pci.py => src/dev/Pci.py rename : src/python/m5/objects/Platform.py => src/dev/Platform.py rename : src/python/m5/objects/SimConsole.py => src/dev/SimConsole.py rename : src/python/m5/objects/SimpleDisk.py => src/dev/SimpleDisk.py rename : src/python/m5/objects/Uart.py => src/dev/Uart.py rename : src/python/m5/objects/AlphaConsole.py => src/dev/alpha/AlphaConsole.py rename : src/python/m5/objects/Tsunami.py => src/dev/alpha/Tsunami.py rename : src/python/m5/objects/T1000.py => src/dev/sparc/T1000.py rename : src/python/m5/objects/Bridge.py => src/mem/Bridge.py rename : src/python/m5/objects/Bus.py => src/mem/Bus.py rename : src/python/m5/objects/MemObject.py => src/mem/MemObject.py rename : src/python/m5/objects/PhysicalMemory.py => src/mem/PhysicalMemory.py rename : src/python/m5/objects/BaseCache.py => src/mem/cache/BaseCache.py rename : src/python/m5/objects/CoherenceProtocol.py => src/mem/cache/coherence/CoherenceProtocol.py rename : src/python/m5/objects/Repl.py => src/mem/cache/tags/Repl.py rename : src/python/m5/objects/Process.py => src/sim/Process.py rename : src/python/m5/objects/Root.py => src/sim/Root.py rename : src/python/m5/objects/System.py => src/sim/System.py extra : convert_revision : 173f8764bafa8ef899198438fa5573874e407321
2007-04-21fixes for solaris compileAli Saidi
--HG-- extra : convert_revision : c82a62a61650e3700d237da917c453e5a9676320
2007-03-10Rework the way SCons recurses into subdirectories, making itNathan Binkert
automatic. The point is that now a subdirectory can be added to the build process just by creating a SConscript file in it. The process has two passes. On the first pass, all subdirs of the root of the tree are searched for SConsopts files. These files contain any command line options that ought to be added for a particular subdirectory. On the second pass, all subdirs of the src directory are searched for SConscript files. These files describe how to build any given subdirectory. I have added a Source() function. Any file (relative to the directory in which the SConscript resides) passed to that function is added to the build. Clean up everything to take advantage of Source(). function is added to the list of files to be built. --HG-- extra : convert_revision : 103f6b490d2eb224436688c89cdc015211c4fd30
2007-03-03Implement Niagara I/O interface and rework interruptsAli Saidi
configs/common/FSConfig.py: Use binaries we've compiled instead of the ones that come with Legion src/arch/alpha/interrupts.hh: get rid of post(int int_type) and add a get_vec function that gets the interrupt vector for an interrupt number src/arch/sparc/asi.cc: Add AsiIsInterrupt() to AsiIsMmu() src/arch/sparc/faults.cc: src/arch/sparc/faults.hh: Add InterruptVector type src/arch/sparc/interrupts.hh: rework interrupts. They are no longer cleared when created... A I/O or ASI read/write needs to happen before they are cleared src/arch/sparc/isa_traits.hh: Add the "interrupt" trap types to isa traits src/arch/sparc/miscregfile.cc: add names for all the misc registers and possible post an interrupt when TL is changed. src/arch/sparc/miscregfile.hh: Add a helper function to post an interrupt when pil < some set softint src/arch/sparc/regfile.cc: src/arch/sparc/regfile.hh: InterruptLevel shouldn't really live here, moved to interrupt.hh src/arch/sparc/tlb.cc: Add interrupt ASIs to TLB src/arch/sparc/ua2005.cc: Add checkSoftInt to check if a softint needs to be posted Check that a tickCompare isn't scheduled before scheduling one Post and clear interrupts on queue writes and what not src/base/bitfield.hh: Add an helper function to return the msb that is set src/cpu/base.cc: src/cpu/base.hh: get rid of post_interrupt(type) since it's no longer needed.. Add a way to see what interrupts are pending src/cpu/intr_control.cc: src/cpu/intr_control.hh: src/dev/alpha/tsunami_cchip.cc: src/python/m5/objects/IntrControl.py: Make IntrControl have a system pointer rather than using a cpu pointer to get one src/dev/sparc/SConscript: add iob to SConsscrip tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.out: update config.ini/out for intrcntrl not having a cpu pointer anymore --HG-- extra : convert_revision : 38614f6b9ffc8f3c93949a94ff04b7d2987168dd
2007-02-13Make mulitple consoles work and be distinguishable from each otherAli Saidi
src/dev/alpha/tsunamireg.h: get rid of things that aren't really tsunami registers src/dev/platform.hh: src/dev/uart.cc: the uart pointer isn't used anymore src/dev/simconsole.cc: make the simconsole print something more useful to distinguish between various consoles in a single system src/dev/uart8250.hh: put the needed uart defines in here rather than including them from tsunamireg src/python/m5/objects/T1000.py: add a console to the T1000 config for the hypervisor --HG-- extra : convert_revision : 76ca92122e611eaf76b989bc699582eef8297be8
2007-01-28Stick the conversion of python to unix time with all ofNathan Binkert
the other param code so that other functions can use it as well. --HG-- extra : convert_revision : a8becdeadc70af0b64bff5b0770788dfba6e1857
2007-01-25Instead of passing an int to represent time between python and C++Nathan Binkert
pass the tuple of python's struct_time and interpret that. Fixes a problem where the local timezone leaked into the time calculation. Also fix things so that the unix, python, and RTC data sheets all get the right time. Provide both years since 1900 and BCD two digit year. Put the date back at 1/1/2006 for now. --HG-- extra : convert_revision : 473244572f468de2cb579a3dd7ae296a6f81f5d7
2007-01-03Add 'Time' as a parameter type that can accept variousNathan Binkert
formats for time (strings, datetime objects, etc.) Advance system time to 1/1/2009 Clean up time management code a little bit --HG-- extra : convert_revision : 28ebecc7ea6b12f4345c77a9a6b4bdf2e752c4f8
2006-12-24Make sure that all of the bits in the result are setNathan Binkert
to some value. --HG-- extra : convert_revision : 1f1700fd77531cbb8cfad7f04ce2b573fcdefdab
2006-12-15little fixes i noticed while searching for reason for address range issues ↵Lisa Hsu
(but these weren't the cause of the problem). RangeSize as a function takes a start address, and a SIZE, and will make the range (start, start+size-1) for you. src/cpu/memtest/memtest.hh: src/cpu/o3/fetch.hh: src/cpu/o3/lsq.hh: src/cpu/ozone/front_end.hh: src/cpu/ozone/lw_lsq.hh: src/cpu/simple/atomic.hh: src/cpu/simple/timing.hh: Fix RangeSize arguments src/dev/alpha/tsunami_cchip.cc: src/dev/alpha/tsunami_io.cc: src/dev/alpha/tsunami_pchip.cc: src/dev/baddev.cc: pioSize indicates SIZE, not a mask --HG-- extra : convert_revision : d385521fcfe58f8dffc8622260937e668a47a948
2006-11-06Get rid of pcifake.cc and tsunami_fake.cc to go with the merged default devices.Gabe Black
--HG-- extra : convert_revision : e88aaaa43843c1283f29cef0886e057412705899
2006-11-06Moved the tsunami devices into the dev/alpha directory. Other devices ↵Gabe Black
"generic" devices are dependent on some of those files. That will either need to change, or most likely those devices will have to be considered architecture dependent. --HG-- rename : src/dev/tsunami.cc => src/dev/alpha/tsunami.cc rename : src/dev/tsunami.hh => src/dev/alpha/tsunami.hh rename : src/dev/tsunami_cchip.cc => src/dev/alpha/tsunami_cchip.cc rename : src/dev/tsunami_cchip.hh => src/dev/alpha/tsunami_cchip.hh rename : src/dev/tsunami_io.cc => src/dev/alpha/tsunami_io.cc rename : src/dev/tsunami_io.hh => src/dev/alpha/tsunami_io.hh rename : src/dev/tsunami_pchip.cc => src/dev/alpha/tsunami_pchip.cc rename : src/dev/tsunami_pchip.hh => src/dev/alpha/tsunami_pchip.hh rename : src/dev/tsunamireg.h => src/dev/alpha/tsunamireg.h extra : convert_revision : ffbb6fd93341d2623a6932bf096019b8976da694
2006-11-06Created seperate SConscript for the dev directory. Made subdirectories for ↵Gabe Black
Alpha and SPARC and put SConscripts in them. --HG-- rename : src/base/kgdb.h => src/arch/alpha/kgdb.h rename : src/dev/alpha_access.h => src/dev/alpha/access.h rename : src/dev/alpha_console.cc => src/dev/alpha/console.cc rename : src/dev/alpha_console.hh => src/dev/alpha/console.hh extra : convert_revision : a7dd466308cb83edc40528689aacb72413089cdf
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-06 04:54:28 +0000