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AgeCommit message (Collapse)Author
2012-05-10gem5: assert before indexing intro arrays to verify boundsAli Saidi
2012-01-28Merge with the main repo.Gabe Black
--HG-- rename : src/mem/vport.hh => src/mem/fs_translating_port_proxy.hh rename : src/mem/translating_port.cc => src/mem/se_translating_port_proxy.cc rename : src/mem/translating_port.hh => src/mem/se_translating_port_proxy.hh
2012-01-17MEM: Separate queries for snooping and address rangesAndreas Hansson
This patch simplifies the address-range determination mechanism and also unifies the naming across ports and devices. It further splits the queries for determining if a port is snooping and what address ranges it responds to (aiming towards a separation of cache-maintenance ports and pure memory-mapped ports). Default behaviours are such that most ports do not have to define isSnooping, and master ports need not implement getAddrRanges.
2011-10-04SE/FS: Put platform pointers in fewer objects.Gabe Black
Not all objects need a platform pointer, and having one creates a dependence on their being a platform object. This change removes the platform pointer to from the base device object and moves it into subclasses that actually need it.
2011-09-30SE/FS: Build the devices in SE mode.Gabe Black
2011-08-19ARM: Add VExpress_E support with PCIe to gem5Ali Saidi
2011-08-19ARM: Add per-cpu local timers for ARM.Geoffrey Blake
Cortex-A9 processors can have a local timer and watchdog counter. It is enabled by default in Linux and up to this point we've had to disable them since a model wasn't available. This change allows a default MP ARM Linux configuration to boot.
2011-08-19ARM: Add per-processor interrupt support to GIC.Prakash Ramrakhani
2011-07-10ARM: Fix mp interrupt bug in GIC.Daniel Johnson
Missing "!" made multiprocessor interrupts operate incorrectly.
2011-05-04ARM: Make GIC handle IPIs and multiple processors.Prakash Ramrakhyani
2011-04-20fix some build problems from prior changesetsNathan Binkert
2010-11-08ARM: Add checkpointing supportAli Saidi
2010-10-01ARM: Fix some subtle bugs in the GICPrakash Ramrakhyani
The GIC code can write to the registers with 8, 16, or 32 byte accesses which could set/clear different numbers of interrupts.
2010-08-23ARM: Add I/O devices for booting linuxAli Saidi
--HG-- rename : src/dev/arm/Versatile.py => src/dev/arm/RealView.py rename : src/dev/arm/versatile.cc => src/dev/arm/realview.cc rename : src/dev/arm/versatile.hh => src/dev/arm/realview.hh