gem5 - gem5

Age	Commit message (Expand)	Author
2015-07-07	sim: Refactor the serialization base class	Andreas Sandberg
2014-12-02	mem: Remove redundant Packet::allocate calls	Andreas Hansson
2013-07-11	dev: consistently end device classes in 'Device'	Steve Reinhardt
2012-11-02	sim: Move the draining interface into a separate base class	Andreas Sandberg
2012-10-15	Port: Add protocol-agnostic ports in the port hierarchy	Andreas Hansson
2012-08-22	Packet: Remove NACKs from packet and its use in endpoints	Andreas Hansson
2012-08-15	O3,ARM: fix some problems with drain/switchout functionality and add Drain DP...	Anthony Gutierrez
2012-03-30	MEM: Introduce the master/slave port sub-classes in C++	William Wang
2012-02-24	MEM: Move port creation to the memory object(s) construction	Andreas Hansson
2012-02-13	MEM: Explicit ports and Python binding on CopyEngine	Andreas Hansson
2012-01-31	clang: Enable compiling gem5 using clang 2.9 and 3.0	Koan-Sin Tan
2011-04-15	trace: reimplement the DTRACE function so it doesn't use a vector	Nathan Binkert
2010-06-02	DMA: Make DmaPort generic enough to be used other places	Ali Saidi
2009-02-26	CPA: Add annotations to IGbE and CopyEngine device models.	Ali Saidi
2009-01-17	CopyEngine: Implement a I/OAT-like copy engine.	Ali Saidi