gem5 - gem5

Age	Commit message (Expand)	Author
2019-05-03	dev: StreamID generation in DMA device	Giacomo Travaglini
2019-04-28	mem: Minimize the use of MemObject.	Gabe Black
2019-03-19	arch, cpu, dev, gpu, mem, sim, python: start using getPort.	Gabe Black
2017-07-12	dev: Refactor some Event subclasses to lambdas	Sean Wilson
2017-06-20	dev: Replace EventWrapper use with EventFunctionWrapper	Sean Wilson
2017-03-07	dev, kvm: Add a fast KVM-aware mode in DmaReadFifo	Sudhanshu Jha
2016-09-13	dev: Add a DmaCallback class to DmaDevice	Michael LeBeane
2015-10-12	misc: Add explicit overrides and fix other clang >= 3.5 issues	Andreas Hansson
2015-10-12	misc: Remove redundant compiler-specific defines	Andreas Hansson
2015-08-07	dev: Add a simple DMA engine that can be used by devices	Andreas Sandberg
2015-07-07	sim: Refactor and simplify the drain API	Andreas Sandberg
2015-07-07	sim: Decouple draining from the SimObject hierarchy	Andreas Sandberg
2015-03-02	mem: Split port retry for all different packet classes	Andreas Hansson
2014-12-23	arm: Add stats to table walker	Curtis Dunham
2013-07-18	mem: Set the cache line size on a system level	Andreas Hansson
2012-11-02	sim: Move the draining interface into a separate base class	Andreas Sandberg
2012-10-23	dev: Remove zero-time loop in DMA timing send	Andreas Hansson
2012-10-15	Port: Add protocol-agnostic ports in the port hierarchy	Andreas Hansson
2012-08-22	DMA: Refactor the DMA device and align timing and atomic	Andreas Hansson
2012-08-22	Packet: Remove NACKs from packet and its use in endpoints	Andreas Hansson
2012-07-27	dma: remove unused variable	Anthony Gutierrez
2012-06-05	sim: Remove FastAlloc	Ali Saidi
2012-05-23	DMA: Split the DMA device and IO device into seperate files	Andreas Hansson