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2013-07-11dev: consistently end device classes in 'Device'Steve Reinhardt
PciDev and IntDev stuck out as the only device classes that ended in 'Dev' rather than 'Device'. This patch takes care of that inconsistency. Note that you may need to delete pre-existing files matching build/*/python/m5/internal/param_* as scons does not pick up indirect dependencies on imported python modules when generating params, and the PciDev -> PciDevice rename takes place in a file (dev/Device.py) that gets imported quite a bit. Committed by: Nilay Vaish <nilay@cs.wisc.edu>
2013-02-19scons: Fix warnings issued by clang 3.2svn (XCode 4.6)Andreas Hansson
This patch fixes the warnings that clang3.2svn emit due to the "-Wall" flag. There is one case of an uninitialised value in the ARM neon ISA description, and then a whole range of unused private fields that are pruned.
2012-11-02sim: Move the draining interface into a separate base classAndreas Sandberg
This patch moves the draining interface from SimObject to a separate class that can be used by any object needing draining. However, objects not visible to the Python code (i.e., objects not deriving from SimObject) still depend on their parents informing them when to drain. This patch also gets rid of the CountedDrainEvent (which isn't really an event) and replaces it with a DrainManager.
2012-09-10Device: Bump PIO and PCI latencies to more reasonable valuesAndreas Hansson
This patch addresses a previously highlighted issue with the default latencies used for PIO and PCI devices. The values are merely educated guesses and might not represent the particular system you want to model. However, the values in this patch are definitely far more realistic than the previous ones. In i8254xGBe, the writeConfig method is updated to use configDelay instead of pioDelay. A follow-up patch will update the regression stats.
2012-09-07Igbe: Newer kernels seem to allow TSO headers and packet data to be in one descAli Saidi
Implement some code we used to panic on as it actually does happen with the e1000 driver in Linux 3.3+. We used to assume that a TSO header would never be part of a larger payload, however it appears as though it now can be.
2012-08-28Clock: Add a Cycles wrapper class and use where applicableAndreas Hansson
This patch addresses the comments and feedback on the preceding patch that reworks the clocks and now more clearly shows where cycles (relative cycle counts) are used to express time. Instead of bumping the existing patch I chose to make this a separate patch, merely to try and focus the discussion around a smaller set of changes. The two patches will be pushed together though. This changes done as part of this patch are mostly following directly from the introduction of the wrapper class, and change enough code to make things compile and run again. There are definitely more places where int/uint/Tick is still used to represent cycles, and it will take some time to chase them all down. Similarly, a lot of parameters should be changed from Param.Tick and Param.Unsigned to Param.Cycles. In addition, the use of curTick is questionable as there should not be an absolute cycle. Potential solutions can be built on top of this patch. There is a similar situation in the o3 CPU where lastRunningCycle is currently counting in Cycles, and is still an absolute time. More discussion to be had in other words. An additional change that would be appropriate in the future is to perform a similar wrapping of Tick and probably also introduce a Ticks class along with suitable operators for all these classes.
2012-08-28Clock: Rework clocks to avoid tick-to-cycle transformationsAndreas Hansson
This patch introduces the notion of a clock update function that aims to avoid costly divisions when turning the current tick into a cycle. Each clocked object advances a private (hidden) cycle member and a tick member and uses these to implement functions for getting the tick of the next cycle, or the tick of a cycle some time in the future. In the different modules using the clocks, changes are made to avoid counting in ticks only to later translate to cycles. There are a few oddities in how the O3 and inorder CPU count idle cycles, as seen by a few locations where a cycle is subtracted in the calculation. This is done such that the regression does not change any stats, but should be revisited in a future patch. Another, much needed, change that is not done as part of this patch is to introduce a new typedef uint64_t Cycle to be able to at least hint at the unit of the variables counting Ticks vs Cycles. This will be done as a follow-up patch. As an additional follow up, the thread context still uses ticks for the book keeping of last activate and last suspend and this should probably also be changed into cycles as well.
2012-08-21Clock: Move the clock and related functions to ClockedObjectAndreas Hansson
This patch moves the clock of the CPU, bus, and numerous devices to the new class ClockedObject, that sits in between the SimObject and MemObject in the class hierarchy. Although there are currently a fair amount of MemObjects that do not make use of the clock, they potentially should do so, e.g. the caches should at some point have the same clock as the CPU, potentially with a 1:n ratio. This patch does not introduce any new clock objects or object hierarchies (clusters, clock domains etc), but is still a step in the direction of having a more structured approach clock domains. The most contentious part of this patch is the serialisation of clocks that some of the modules (but not all) did previously. This serialisation should not be needed as the clock is set through the parameters even when restoring from the checkpoint. In other words, the state is "stored" in the Python code that creates the modules. The nextCycle methods are also simplified and the clock phase parameter of the CPU is removed (this could be part of a clock object once they are introduced).
2012-08-15O3,ARM: fix some problems with drain/switchout functionality and add Drain ↵Anthony Gutierrez
DPRINTFs This patch fixes some problems with the drain/switchout functionality for the O3 cpu and for the ARM ISA and adds some useful debug print statements. This is an incremental fix as there are still a few bugs/mem leaks with the switchout code. Particularly when switching from an O3CPU to a TimingSimpleCPU. However, when switching from O3 to O3 cores with the ARM ISA I haven't encountered any more assertion failures; now the kernel will typically panic inside of simulation.
2012-07-09Fix: Address a few benign memory leaksAndreas Hansson
This patch is the result of static analysis identifying a number of memory leaks. The leaks are all benign as they are a result of not deallocating memory in the desctructor. The fix still has value as it removes false positives in the static analysis.
2012-05-10IGbE: Fix writeback conditions for i8254x GbE in updated data sheet.Pritha Ghoshal
An older revision of the data sheet specified that txdctl.gran was 1 the granularity was based on cache block and gran being 0 is based on descriptor count. The newer version of the data sheet reverses this errata
2012-02-24MEM: Move port creation to the memory object(s) constructionAndreas Hansson
This patch moves all port creation from the getPort method to be consistently done in the MemObject's constructor. This is possible thanks to the Swig interface passing the length of the vector ports. Previously there was a mix of: 1) creating the ports as members (at object construction time) and using getPort for the name resolution, or 2) dynamically creating the ports in the getPort call. This is now uniform. Furthermore, objects that would not be complete without a port have these ports as members rather than having pointers to dynamically allocated ports. This patch also enables an elaboration-time enumeration of all the ports in the system which can be used to determine the masterId.
2011-12-13gcc: fix unused variable warnings from GCC 4.6.1Nathan Binkert
--HG-- extra : rebase_source : f9e22de341493a25ac6106c16ac35c61c128a080
2011-09-13IGbE: Clean up debug printing and proprly account for copied bytes.Ali Saidi
Some DPRINTFs were printing uninitalized values because the DPRINTFs were always being printed even when the features they were printing weren't being used. This change moves the DPRINTFs into the appropriate if blocks and initializes the state variables correctly. There also is a case where the offset into the packet could be calculated incorrectly during a DMA that is fixed.
2011-04-15trace: reimplement the DTRACE function so it doesn't use a vectorNathan Binkert
At the same time, rename the trace flags to debug flags since they have broader usage than simply tracing. This means that --trace-flags is now --debug-flags and --trace-help is now --debug-help
2011-01-07Replace curTick global variable with accessor functions.Steve Reinhardt
This step makes it easy to replace the accessor functions (which still access a global variable) with ones that access per-thread curTick values.
2010-04-15tick: rename Clock namespace to SimClockNathan Binkert
2009-06-05types: need typename keyword to get the type.Nathan Binkert
2009-06-04types: clean up types, especially signed vs unsignedNathan Binkert
2009-04-22i8254xGBe: major style overhaul.Steve Reinhardt
Moved DescCache template functions from .hh to .cc file. Also fixed lots of line-wrapping problems, and some irregular indentation.
2009-02-26CPA: Add annotations to IGbE and CopyEngine device models.Ali Saidi
2009-01-23IGbE: Fix two e1000 driver bugs that I missed before.Ali Saidi
2009-01-06IGbE: Implement header splitting with large MTUAli Saidi
2009-01-06IGbE: Remove is8257 variableAli Saidi
2008-12-05IGbE: Add support for newer 8257x based Intel NICsAli Saidi
2008-12-05IGbE: Add support for TCP segment offloadAli Saidi
2008-10-09eventq: convert all usage of events to use the new API.Nathan Binkert
For now, there is still a single global event queue, but this is necessary for making the steps towards a parallelized m5.
2008-08-24IGbE: Patches I neglected to apply before pushing the previous igbe changesetAli Saidi
2008-08-13Add the ability to specify a think time before descriptor fetch/writeback ↵Ali Saidi
starts/ends as well as after read/write dmas
2008-08-13More subtle fixes to how interrupts are supposed to work in the device. Fix ↵Ali Saidi
postedInterrupts statistics.
2008-07-01Fix cases where RADV interrupt timer is used and make ITR interrupt ↵Ali Saidi
moderation not always delay if no interrupts have been posted for the ITR value.
2008-06-17Ethernet: share statistics between all ethernet devices and apply someNathan Binkert
of those statistics to the e1000 model.
2008-05-20IGbE: Implement sending packet that is contained in more than 2 descriptors.Ali Saidi
--HG-- extra : convert_revision : 8fb7d5fad5cb840f69c31aa8b331dbe09e46ee9d
2008-03-25IGbE: Fix bug that limits wire performance a bitAli Saidi
--HG-- extra : convert_revision : 3f93c17f647a6955dab861da211174de856ee02c
2008-02-10IGbE: Fix a couple of bugs.Ali Saidi
--HG-- extra : convert_revision : a1f16bd82b6fbd5b6b5dc0f08b9e69858bea86ca
2007-09-28Rename cycles() function to ticks()Ali Saidi
--HG-- extra : convert_revision : 790eddb793d4f5ba35813d001037bd8601bd76a5
2007-09-12Devices: More fixes to Intel NIC Model.Ali Saidi
--HG-- extra : convert_revision : 14306d3cd79bbef7decdf2fd370ed7e7f2b10a93
2007-08-26Merge with headGabe Black
--HG-- extra : convert_revision : cc73b9aaf73e9dacf52f3350fa591e67ca4ccee6
2007-08-16Devices: Make EtherInts connect in the same way memory ports currently do.Ali Saidi
--HG-- extra : convert_revision : 765b096785a77df9adc4791c9101b90696bd7be2
2007-07-26Merge python and x86 changes with cache branchNathan Binkert
--HG-- extra : convert_revision : e06a950964286604274fba81dcca362d75847233
2007-07-23Major changes to how SimObjects are created and initialized. Almost allNathan Binkert
creation and initialization now happens in python. Parameter objects are generated and initialized by python. The .ini file is now solely for debugging purposes and is not used in construction of the objects in any way. --HG-- extra : convert_revision : 7e722873e417cb3d696f2e34c35ff488b7bff4ed
2007-06-30Get rid of Packet result field. Error responses areSteve Reinhardt
now encoded in cmd field. --HG-- extra : convert_revision : d67819b7e3ee4b9a5bf08541104de0a89485e90b
2007-05-14couple more bug fixes for intel nicAli Saidi
src/dev/i8254xGBe.cc: src/dev/i8254xGBe.hh: couple more bug fixes --HG-- extra : convert_revision : ae5b806528c1ec06f0091e1f6e50fc0721057ddb
2007-05-09couple of updates in the intel nicAli Saidi
--HG-- extra : convert_revision : da68e5e6411000d9d5247f769ee528a443286c61
2007-05-09update for new reschedule semanticsAli Saidi
--HG-- extra : convert_revision : 8c18b2513d638f67cc096e7f1483b47390a374ca
2007-05-09add a backoff algorithm when nacks are received by devicesAli Saidi
add seperate response buffers and request queue sizes in bus bridge add delay to respond to a nack in the bus bridge src/dev/i8254xGBe.cc: src/dev/ide_ctrl.cc: src/dev/ns_gige.cc: src/dev/pcidev.hh: src/dev/sinic.cc: add backoff delay parameters src/dev/io_device.cc: src/dev/io_device.hh: add a backoff algorithm when nacks are received. src/mem/bridge.cc: src/mem/bridge.hh: add seperate response buffers and request queue sizes add a new parameters to specify how long before a nack in ready to go after a packet that needs to be nacked is received src/mem/cache/cache_impl.hh: assert on the src/mem/tport.cc: add a friendly assert to make sure the packet was inserted into the list --HG-- extra : convert_revision : 3595ad932015a4ce2bb72772da7850ad91bd09b1
2007-04-30fix igbe bugAli Saidi
--HG-- extra : convert_revision : 01ffc08f5c1ec827a42f60562ae7e10176ffdb7f
2007-03-29make serialization at least seem to workAli Saidi
--HG-- extra : convert_revision : cbfdb64f9a204670b8dd0294c74a17044b9f330c
2007-03-27some more fixes... non-tso stuff seems to workAli Saidi
--HG-- extra : convert_revision : da604d20443376d04826397d0aaff0bdd744053b
2007-03-26first bit of life from the intel gigabit modelAli Saidi
--HG-- extra : convert_revision : d8944a53f6b585df21651c4e624518d5c49a7837