gem5 - gem5

Age	Commit message (Collapse)	Author
2007-05-14	couple more bug fixes for intel nic	Ali Saidi
	src/dev/i8254xGBe.cc: src/dev/i8254xGBe.hh: couple more bug fixes --HG-- extra : convert_revision : ae5b806528c1ec06f0091e1f6e50fc0721057ddb
2007-05-09	couple of updates in the intel nic	Ali Saidi
	--HG-- extra : convert_revision : da68e5e6411000d9d5247f769ee528a443286c61
2007-05-09	update for new reschedule semantics	Ali Saidi
	--HG-- extra : convert_revision : 8c18b2513d638f67cc096e7f1483b47390a374ca
2007-05-09	add a backoff algorithm when nacks are received by devices	Ali Saidi
	add seperate response buffers and request queue sizes in bus bridge add delay to respond to a nack in the bus bridge src/dev/i8254xGBe.cc: src/dev/ide_ctrl.cc: src/dev/ns_gige.cc: src/dev/pcidev.hh: src/dev/sinic.cc: add backoff delay parameters src/dev/io_device.cc: src/dev/io_device.hh: add a backoff algorithm when nacks are received. src/mem/bridge.cc: src/mem/bridge.hh: add seperate response buffers and request queue sizes add a new parameters to specify how long before a nack in ready to go after a packet that needs to be nacked is received src/mem/cache/cache_impl.hh: assert on the src/mem/tport.cc: add a friendly assert to make sure the packet was inserted into the list --HG-- extra : convert_revision : 3595ad932015a4ce2bb72772da7850ad91bd09b1
2007-04-30	fix igbe bug	Ali Saidi
	--HG-- extra : convert_revision : 01ffc08f5c1ec827a42f60562ae7e10176ffdb7f
2007-03-29	make serialization at least seem to work	Ali Saidi
	--HG-- extra : convert_revision : cbfdb64f9a204670b8dd0294c74a17044b9f330c
2007-03-27	some more fixes... non-tso stuff seems to work	Ali Saidi
	--HG-- extra : convert_revision : da604d20443376d04826397d0aaff0bdd744053b
2007-03-26	first bit of life from the intel gigabit model	Ali Saidi
	--HG-- extra : convert_revision : d8944a53f6b585df21651c4e624518d5c49a7837
2007-03-22	finish up the coding of the Intel Gb NIC... Many Many bugs to squash	Ali Saidi
	src/dev/i8254xGBe.cc: src/dev/i8254xGBe.hh: src/dev/i8254xGBe_defs.hh: finish coding the Intel Gb NIC device src/dev/io_device.hh: we really don't want to be able to pass a null buffer to dma read, at least not the way we have things setup now... it won't work at all --HG-- extra : convert_revision : 6739497232317ec407cfa7a96de4575a9a6cfc46
2007-03-15	add all the registers we'll need to support for the Intel GbE device and ↵	Ali Saidi
	support enough functionality make the driver think the device is there, and in good working order. src/dev/SConscript: add intel gbe to the dev SCons file src/dev/i8254xGBe.cc: src/dev/i8254xGBe.hh: src/dev/i8254xGBe_defs.hh: use new manner of registers and implement all device registers that are touched through boot and ifup --HG-- extra : convert_revision : b1a1767f0fd31cd371e432cb48ac9a2e9f9291b5
2006-10-27	add packet_access.hh	Ali Saidi
	--HG-- extra : convert_revision : 7fe4958549101fca9613baa4a317d96f4970d432
2006-10-20	Merge zizzer:/bk/newmem	Ali Saidi
	into zeep.pool:/z/saidi/work/m5.newmem.head --HG-- extra : convert_revision : c0f9bde20585b3811ff906728b003072b69696b5
2006-10-20	still working on getting past initialization	Ali Saidi
	--HG-- extra : convert_revision : 7a5fccb9a19d363e479ef24012a7b8598272eaa9
2006-10-20	Use PacketPtr everywhere	Nathan Binkert
	--HG-- extra : convert_revision : d9eb83ab77ffd2d725961f295b1733137e187711
2006-09-18	add boiler plate intel nic code	Ali Saidi
	src/SConscript: add intel nic to sconscript src/dev/pcidev.cc: fix bug with subsystemid value src/python/m5/objects/Ethernet.py: add intel nic to ethernet.py src/python/m5/objects/Ide.py: src/python/m5/objects/Pci.py: Move config_latency into pci where it belogs --HG-- extra : convert_revision : 7163aaf7b4098496518b0910cef62f2ce3dd574d