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path: root/src/dev/io_device.cc
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2012-03-30MEM: Introduce the master/slave port sub-classes in C++William Wang
This patch introduces the notion of a master and slave port in the C++ code, thus bringing the previous classification from the Python classes into the corresponding simulation objects and memory objects. The patch enables us to classify behaviours into the two bins and add assumptions and enfore compliance, also simplifying the two interfaces. As a starting point, isSnooping is confined to a master port, and getAddrRanges to slave ports. More of these specilisations are to come in later patches. The getPort function is not getMasterPort and getSlavePort, and returns a port reference rather than a pointer as NULL would never be a valid return value. The default implementation of these two functions is placed in MemObject, and calls fatal. The one drawback with this specific patch is that it requires some code duplication, e.g. QueuedPort becomes QueuedMasterPort and QueuedSlavePort, and BusPort becomes BusMasterPort and BusSlavePort (avoiding multiple inheritance). With the later introduction of the port interfaces, moving the functionality outside the port itself, a lot of the duplicated code will disappear again.
2012-03-22MEM: Split SimpleTimingPort into PacketQueue and portsAndreas Hansson
This patch decouples the queueing and the port interactions to simplify the introduction of the master and slave ports. By separating the queueing functionality from the port itself, it becomes much easier to distinguish between master and slave ports, and still retain the queueing ability for both (without code duplication). As part of the split into a PacketQueue and a port, there is now also a hierarchy of two port classes, QueuedPort and SimpleTimingPort. The QueuedPort is useful for ports that want to leave the packet transmission of outgoing packets to the queue and is used by both master and slave ports. The SimpleTimingPort inherits from the QueuedPort and adds the implemention of recvTiming and recvFunctional through recvAtomic. The PioPort and MessagePort are cleaned up as part of the changes. --HG-- rename : src/mem/tport.cc => src/mem/packet_queue.cc rename : src/mem/tport.hh => src/mem/packet_queue.hh
2012-02-24MEM: Move port creation to the memory object(s) constructionAndreas Hansson
This patch moves all port creation from the getPort method to be consistently done in the MemObject's constructor. This is possible thanks to the Swig interface passing the length of the vector ports. Previously there was a mix of: 1) creating the ports as members (at object construction time) and using getPort for the name resolution, or 2) dynamically creating the ports in the getPort call. This is now uniform. Furthermore, objects that would not be complete without a port have these ports as members rather than having pointers to dynamically allocated ports. This patch also enables an elaboration-time enumeration of all the ports in the system which can be used to determine the masterId.
2012-02-12mem: Add a master ID to each request object.Ali Saidi
This change adds a master id to each request object which can be used identify every device in the system that is capable of issuing a request. This is part of the way to removing the numCpus+1 stats in the cache and replacing them with the master ids. This is one of a series of changes that make way for the stats output to be changed to python.
2012-01-28Merge with the main repo.Gabe Black
--HG-- rename : src/mem/vport.hh => src/mem/fs_translating_port_proxy.hh rename : src/mem/translating_port.cc => src/mem/se_translating_port_proxy.cc rename : src/mem/translating_port.hh => src/mem/se_translating_port_proxy.hh
2012-01-16Merge yet again with the main repository.Gabe Black
2012-01-17MEM: Separate queries for snooping and address rangesAndreas Hansson
This patch simplifies the address-range determination mechanism and also unifies the naming across ports and devices. It further splits the queries for determining if a port is snooping and what address ranges it responds to (aiming towards a separation of cache-maintenance ports and pure memory-mapped ports). Default behaviours are such that most ports do not have to define isSnooping, and master ports need not implement getAddrRanges.
2012-01-17MEM: Simplify ports by removing EventManagerAndreas Hansson
This patch removes the inheritance of EventManager from the ports and moves all responsibility for event queues to the owner. Eventually the event manager should be the interface block, which could either be the structural owner or a subblock like a LSQ in the O3 CPU for example.
2012-01-10DPRINTF: Improve some dprintf messages.Nilay Vaish
2012-01-07Another merge with the main repository.Gabe Black
2012-01-07Merge with the main repository again.Gabe Black
2012-01-07Merge with main repository.Gabe Black
2011-12-15IO: Fix bug in DMA Device where receiving a snoop on DMA port would cause a ↵Ali Saidi
panic. --HG-- extra : rebase_source : 8152d4fa7d7354c9f150a450ae0710e95141ba4b
2011-12-01Device: Make changes necessary to support a coherent page walker cache.Mitchell Hayenga
Adds the flag 'recvSnoops' which enables pagewalkers using DmaPorts, to properly configure snoops. --HG-- extra : rebase_source : 64207bef62c3268ddff2236ee4adae873812325f
2011-10-20dev: clean up PioDevice and DmaDevive getPort() methods.Steve Reinhardt
Make DmaDevice::getPort() call PioDevice::getPort() instead of just copying and pasting the code. Also move definitions from .hh to .cc file.
2011-10-08Ports: Print the port name when a port is used but not attached to anything.Gabe Black
2011-10-04SE/FS: Put platform pointers in fewer objects.Gabe Black
Not all objects need a platform pointer, and having one creates a dependence on their being a platform object. This change removes the platform pointer to from the base device object and moves it into subclasses that actually need it.
2011-04-15trace: reimplement the DTRACE function so it doesn't use a vectorNathan Binkert
At the same time, rename the trace flags to debug flags since they have broader usage than simply tracing. This means that --trace-flags is now --debug-flags and --trace-help is now --debug-help
2011-04-15includes: sort all includesNathan Binkert
2011-03-17Mem: Fix issue with dirty block being lost when entire block transferred to ↵Ali Saidi
non-cache. This change fixes the problem for all the cases we actively use. If you want to try more creative I/O device attachments (E.g. sharing an L2), this won't work. You would need another level of caching between the I/O device and the cache (which you actually need anyway with our current code to make sure writes propagate). This is required so that you can mark the cache in between as top level and it won't try to send ownership of a block to the I/O device. Asserts have been added that should catch any issues.
2011-01-07Replace curTick global variable with accessor functions.Steve Reinhardt
This step makes it easy to replace the accessor functions (which still access a global variable) with ones that access per-thread curTick values.
2010-11-08Bus: Have the I/O devices that return address ranges print them out.Ali Saidi
This way we actually get device names associated with the devices.
2010-08-23Devices: Allow a device to specify that a request is uncachable.Gene Wu
2010-06-02DMA: Make DmaPort generic enough to be used other placesAli Saidi
2008-10-09eventq: convert all usage of events to use the new API.Nathan Binkert
For now, there is still a single global event queue, but this is necessary for making the steps towards a parallelized m5.
2008-08-26Device: Fix bug in DmaPort::recvRetry. The interface attempts to send the ↵Clint Smullen
same packet again. It doesn't cause a problem currently, however with a different Memory Object it could cause problems
2008-08-13Add the ability for a DMA to tack on an extra delay after the DMA is ↵Ali Saidi
actually finished.
2007-07-26Merge python and x86 changes with cache branchNathan Binkert
--HG-- extra : convert_revision : e06a950964286604274fba81dcca362d75847233
2007-07-23Major changes to how SimObjects are created and initialized. Almost allNathan Binkert
creation and initialization now happens in python. Parameter objects are generated and initialized by python. The .ini file is now solely for debugging purposes and is not used in construction of the objects in any way. --HG-- extra : convert_revision : 7e722873e417cb3d696f2e34c35ff488b7bff4ed
2007-07-14Merge of DPRINTF fixes from head.Steve Reinhardt
--HG-- extra : convert_revision : f99a33b2df6a6c5592856d17d00e73ee83267442
2007-07-14Fix & tweak DPRINTFs for tracediff w/new cache code.Steve Reinhardt
Note that we should *not* print pointer values in DPRINTFs as these needlessly clutter tracediff output. --HG-- extra : convert_revision : 25a448f1b3ac8d453a717a104ad6dc0112fb30bb
2007-06-30Get rid of Packet result field. Error responses areSteve Reinhardt
now encoded in cmd field. --HG-- extra : convert_revision : d67819b7e3ee4b9a5bf08541104de0a89485e90b
2007-05-21Change getDeviceAddressRanges to use bool for snoop arg.Steve Reinhardt
--HG-- extra : convert_revision : 832e52ba80cbab2f5bb6d5b5977a499d41b4d638
2007-05-14add uglyiness to fix dmasAli Saidi
src/dev/io_device.cc: extra printing and assertions src/mem/bridge.hh: deal with packets only satisfying part of a request by making many requests src/mem/cache/cache_impl.hh: make the cache try to satisfy a functional request from the cache above it before checking itself --HG-- extra : convert_revision : 1df52ab61d7967e14cc377c560495430a6af266a
2007-05-09update for new reschedule semanticsAli Saidi
--HG-- extra : convert_revision : 8c18b2513d638f67cc096e7f1483b47390a374ca
2007-05-09add a backoff algorithm when nacks are received by devicesAli Saidi
add seperate response buffers and request queue sizes in bus bridge add delay to respond to a nack in the bus bridge src/dev/i8254xGBe.cc: src/dev/ide_ctrl.cc: src/dev/ns_gige.cc: src/dev/pcidev.hh: src/dev/sinic.cc: add backoff delay parameters src/dev/io_device.cc: src/dev/io_device.hh: add a backoff algorithm when nacks are received. src/mem/bridge.cc: src/mem/bridge.hh: add seperate response buffers and request queue sizes add a new parameters to specify how long before a nack in ready to go after a packet that needs to be nacked is received src/mem/cache/cache_impl.hh: assert on the src/mem/tport.cc: add a friendly assert to make sure the packet was inserted into the list --HG-- extra : convert_revision : 3595ad932015a4ce2bb72772da7850ad91bd09b1
2006-10-31Ports now have a pointer to the MemObject that owns it (can be NULL).Kevin Lim
src/cpu/simple/atomic.hh: Port now takes in the MemObject that owns it. src/cpu/simple/timing.hh: Port now takes in MemObject that owns it. src/dev/io_device.cc: src/mem/bus.hh: Ports now take in the MemObject that owns it. src/mem/cache/base_cache.cc: Ports now take in the MemObject that own it. src/mem/port.hh: src/mem/tport.hh: Ports now optionally take in the MemObject that owns it. --HG-- extra : convert_revision : 890a72a871795987c2236c65937e06973412d349
2006-10-20Use PacketPtr everywhereNathan Binkert
--HG-- extra : convert_revision : d9eb83ab77ffd2d725961f295b1733137e187711
2006-08-30Move more common functionality into SimpleTimingPort,Steve Reinhardt
allowing derived classes to be simplified. --HG-- extra : convert_revision : c980d3aec5e6c044d8f41e96252726fe9a256605
2006-08-30Minor include file & formatting cleanup.Steve Reinhardt
--HG-- extra : convert_revision : fa23563b2897687752379d63ddab5cccb92484ba
2006-07-20Move PioPort timing code into Simple Timing Port objectAli Saidi
Make PioPort use it Make Physical memory use it as well src/SConscript: Add timing port to sconscript src/dev/io_device.cc: src/dev/io_device.hh: Move simple timing pio port stuff into a simple timing port class so it can be used by the physical memory src/mem/physical.cc: src/mem/physical.hh: use a simple timing port stuff instead of rolling our own here --HG-- extra : convert_revision : e5befbd295a572568cfdca533efb5ed1984c59d1
2006-07-13add system.mem_mode = ['timing', 'atomic']Ali Saidi
update scripts acordingly configs/test/SysPaths.py: new syspaths from nate, this one allows you to set script, binary, and disk paths like system.dir = 'aouaou' in your script configs/test/fs.py: update for system mem_mode Put small checkpoint example Make clock 1THz configs/test/test.py: src/arch/alpha/freebsd/system.cc: src/arch/alpha/linux/system.cc: src/arch/alpha/system.cc: src/arch/alpha/tru64/system.cc: src/arch/sparc/system.cc: src/python/m5/objects/System.py: src/sim/system.cc: src/sim/system.hh: update for system mem_mode src/dev/io_device.cc: Use time returned from sendAtomic to delay --HG-- extra : convert_revision : 67eedb3c84ab2584613faf88a534e793926fc92f
2006-07-12memory mode information now contained in system objectAli Saidi
States are now running, draining, or drained. memory state information moved into system object system parameter is not fs only for cpus Implement drain() support in devices Update for drain() call that returns number of times drain_event->process() will be called Break O3 CPU! No sense in putting in a hack change that kevin is going to remove in a few minutes i imagine src/cpu/simple/atomic.cc: src/cpu/simple/atomic.hh: Since se mode has a system, allow access to it Verify that the atomic cpu is connected to an atomic system on resume src/cpu/simple/base.cc: Since se mode has a system, allow access to it src/cpu/simple/timing.cc: src/cpu/simple/timing.hh: Update for new drain() call that returns number of times drain_event->process() will be called and memory state being moved into the system Since se mode has a system, allow access to it Verify that the timing cpu is connected to an timing system on resume src/dev/ide_disk.cc: src/dev/io_device.cc: src/dev/io_device.hh: src/dev/ns_gige.cc: src/dev/ns_gige.hh: src/dev/pcidev.cc: src/dev/pcidev.hh: src/dev/sinic.cc: src/dev/sinic.hh: Implement drain() support in devices src/python/m5/config.py: Allow drain to return number of times drain_event->process() will be called. Normally 0 or 1 but things like O3 cpu or devices with multiple ports may want to call it many times src/python/m5/objects/BaseCPU.py: move system parameter out of fs to everyone src/sim/sim_object.cc: src/sim/sim_object.hh: States are now running, draining, or drained. memory state information moved into system object src/sim/system.cc: src/sim/system.hh: memory mode information now contained in system object --HG-- extra : convert_revision : 1389c77e66ee6d9710bf77b4306fb47e107b21cf
2006-07-06Add default responder to busAli Saidi
Update configuration for new default responder on bus Update to devices to handle their own pci config space without pciconfigall Remove most of pciconfigall, it now is a dumbdevice which gets it's address based on the bus it's supposed to respond for Remove need for pci config space from platform, add registerPciDevice function to prevent more than one device from having same bus:dev:func and interrupt Remove pciconfigspace from pci devices, and py files Add calcConfigAddr that returns address for config space based on bus/dev/function + offset configs/test/fs.py: Update configuration for new default responder on bus src/dev/ide_ctrl.cc: src/dev/ide_ctrl.hh: src/dev/ns_gige.cc: src/dev/ns_gige.hh: src/dev/pcidev.cc: src/dev/pcidev.hh: Update to handle it's own pci config space without pciconfigall src/dev/io_device.cc: src/dev/io_device.hh: change naming for pio port break out recvTiming into two functions to reuse code src/dev/pciconfigall.cc: src/dev/pciconfigall.hh: removing most of pciconfigall, it now is a dumbdevice which gets it's address based on the bus it's supposed to respond for src/dev/pcireg.h: add a max size for PCI config space (per PCI spec) src/dev/platform.cc: src/dev/platform.hh: remove need for pci config space from platform, add registerPciDevice function to prevent more than one device from having same bus:dev:func and interrupt src/dev/sinic.cc: remove pciconfigspace as it's no longer a needed parameter src/dev/tsunami.cc: src/dev/tsunami.hh: src/dev/tsunami_pchip.cc: src/dev/tsunami_pchip.hh: add calcConfigAddr that returns address for config space based on bus/dev/function + offset (per PCI spec) src/mem/bus.cc: src/mem/bus.hh: src/python/m5/objects/Bus.py: add idea of default responder to bus src/python/m5/objects/Pci.py: add config port for pci devices add latency, bus and size parameters for pci config all (min is 8MB, max is 256MB see pci spec) --HG-- extra : convert_revision : 99db43b0a3a077f86611d6eaff6664a3885da7c9
2006-06-18minor device fixupsAli Saidi
configs/test/SysPaths.py: remove some tabs and add /n/poolfs/z/dist/m5/system src/dev/io_device.cc: fix since pio timing dma packts colud be nacked too src/dev/io_device.hh: move DmaReqState into DmaDevie --HG-- extra : convert_revision : 2b5300d85ab33b3753afc54bc6a04a47b6e00d20
2006-06-08add nacked result and a function to swizzle nacked packet into something ↵Ali Saidi
that can be sent out again implement ability for i/o devices to handle src/dev/io_device.cc: src/dev/io_device.hh: implement ability for i/o devices to handle src/mem/packet.hh: add nacked result and a function to swizzle nacked packet into something that can be sent out again --HG-- extra : convert_revision : fa42b01f4ab21562d37bd6bf6f4d7f69a94f0e86
2006-05-31Updated Authors from bk prs infoAli Saidi
--HG-- extra : convert_revision : 77f475b156d81c03a2811818fa23593d5615c685
2006-05-31Merge zizzer:/bk/newmemAli Saidi
into zeep.pool:/z/saidi/work/m5.newmem --HG-- extra : convert_revision : ebd55fc18b09821712f73867c93bd3d888e7788c
2006-05-31make io device be a little nicer about scheduling retries on the busAli Saidi
--HG-- extra : convert_revision : 19a1f0c7bf79d6d8ef235aae60cdbbbcb7de2b79
2006-05-31Streamline interface to Request object.Steve Reinhardt
src/SConscript: mem/request.cc no longer needed (all functions inline). src/cpu/simple/atomic.cc: src/cpu/simple/base.cc: src/cpu/simple/timing.cc: src/dev/io_device.cc: src/mem/port.cc: Modified Request object interface. src/mem/packet.hh: Modified Request object interface. Address & size are always set together now, so track with single flag. src/mem/request.hh: Streamline interface to support a handful of calls that set multiple fields reflecting common usage patterns. Reduce number of validFoo booleans by combining flags for fields which must be set together. --HG-- extra : convert_revision : 3b499de90d6d5f12f0cc7a9a788663265677fe10
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