gem5 - gem5

Age	Commit message (Expand)	Author
2015-07-07	sim: Decouple draining from the SimObject hierarchy	Andreas Sandberg
2013-07-11	dev: make BasicPioDevice take size in constructor	Steve Reinhardt
2012-11-02	sim: Move the draining interface into a separate base class	Andreas Sandberg
2012-10-15	Port: Add protocol-agnostic ports in the port hierarchy	Andreas Hansson
2012-07-09	Port: Make getAddrRanges const	Andreas Hansson
2012-05-23	DMA: Split the DMA device and IO device into seperate files	Andreas Hansson
2012-05-23	MEM: Add a snooping DMA port subclass for table walker	Andreas Hansson
2012-05-01	MEM: Separate requests and responses for timing accesses	Andreas Hansson
2012-04-14	MEM: Separate snoops and normal memory requests/responses	Andreas Hansson
2012-03-30	MEM: Introduce the master/slave port sub-classes in C++	William Wang
2012-03-22	MEM: Split SimpleTimingPort into PacketQueue and ports	Andreas Hansson
2012-02-24	MEM: Move port creation to the memory object(s) construction	Andreas Hansson
2012-02-12	mem: Add a master ID to each request object.	Ali Saidi
2012-01-28	Merge with the main repo.	Gabe Black
2012-01-17	MEM: Separate queries for snooping and address ranges	Andreas Hansson
2012-01-07	Merge with the main repository again.	Gabe Black
2012-01-07	Merge with main repository.	Gabe Black
2011-12-01	Device: Make changes necessary to support a coherent page walker cache.	Mitchell Hayenga
2011-10-20	dev: clean up PioDevice and DmaDevive getPort() methods.	Steve Reinhardt
2011-10-04	SE/FS: Put platform pointers in fewer objects.	Gabe Black
2010-08-23	Devices: Allow a device to specify that a request is uncachable.	Gene Wu
2010-06-02	DMA: Make DmaPort generic enough to be used other places	Ali Saidi
2009-06-04	types: clean up types, especially signed vs unsigned	Nathan Binkert
2008-11-10	DmaDevice: fix minor type in error message.	Steve Reinhardt
2008-09-29	Make overriding port assignments in Python work,	Steve Reinhardt
2008-08-13	Add the ability for a DMA to tack on an extra delay after the DMA is actually...	Ali Saidi
2008-03-24	Don't FastAlloc MSHRs since we don't allocate them on the fly.	Steve Reinhardt
2007-08-10	DMA: Add IOCache and fix bus bridge to optionally only send requests one	Ali Saidi
2007-07-23	Major changes to how SimObjects are created and initialized. Almost all	Nathan Binkert
2007-05-21	Change getDeviceAddressRanges to use bool for snoop arg.	Steve Reinhardt
2007-05-09	add a backoff algorithm when nacks are received by devices	Ali Saidi
2007-03-22	finish up the coding of the Intel Gb NIC... Many Many bugs to squash	Ali Saidi
2007-02-07	Make memory commands dense again to avoid cache stat table explosion.	Steve Reinhardt
2007-01-26	make our code a little more standards compliant	Ali Saidi
2006-10-20	Use PacketPtr everywhere	Nathan Binkert
2006-10-19	refactor code for the packet, get rid of packet_impl.hh	Nathan Binkert
2006-10-13	Fix for DMA's in FS caches.	Ron Dreslinski
2006-08-30	Move more common functionality into SimpleTimingPort,	Steve Reinhardt
2006-08-30	Minor include file & formatting cleanup.	Steve Reinhardt
2006-08-14	Fix up doxygen.	Steve Reinhardt
2006-07-20	Move PioPort timing code into Simple Timing Port object	Ali Saidi
2006-07-12	memory mode information now contained in system object	Ali Saidi
2006-07-06	Add default responder to bus	Ali Saidi
2006-06-18	minor device fixups	Ali Saidi
2006-06-13	Move SimObject creation and Port connection loops	Steve Reinhardt
2006-06-08	add nacked result and a function to swizzle nacked packet into something that...	Ali Saidi
2006-05-31	Updated Authors from bk prs info	Ali Saidi
2006-05-30	Add a very poor implementation of dealing with retries on timing requests. It...	Ali Saidi
2006-05-26	Significant rework of Packet class interface:	Steve Reinhardt
2006-05-22	New directory structure:	Steve Reinhardt