| Age | Commit message (Expand) | Author |
|---|
| 2013-10-31 | dev: Add support for MSI-X and Capability Lists for ARM and PCI devices | Geoffrey Blake |
| 2013-07-11 | dev: consistently end device classes in 'Device' | Steve Reinhardt |
| 2013-02-19 | mem: Enforce strict use of busFirst- and busLastWordTime | Andreas Hansson |
| 2012-11-02 | sim: Move the draining interface into a separate base class | Andreas Sandberg |
| 2012-07-09 | Port: Make getAddrRanges const | Andreas Hansson |
| 2012-02-24 | MEM: Move port creation to the memory object(s) construction | Andreas Hansson |
| 2012-01-31 | Merge with head, hopefully the last time for this batch. | Gabe Black |
| 2012-01-31 | clang: Enable compiling gem5 using clang 2.9 and 3.0 | Koan-Sin Tan |
| 2012-01-28 | Merge with the main repo. | Gabe Black |
| 2012-01-17 | MEM: Removing the default port peer from Python ports | Andreas Hansson |
| 2012-01-17 | MEM: Separate queries for snooping and address ranges | Andreas Hansson |
| 2011-10-04 | SE/FS: Put platform pointers in fewer objects. | Gabe Black |
| 2011-08-19 | ARM: Add VExpress_E support with PCIe to gem5 | Ali Saidi |
| 2011-04-15 | trace: reimplement the DTRACE function so it doesn't use a vector | Nathan Binkert |
| 2010-11-15 | ARM: Add support for a dumb IDE controller | Ali Saidi |
| 2010-09-10 | style: fix sorting of includes and whitespace in some files | Nathan Binkert |
| 2009-02-01 | Devices: Add support for legacy fixed IO locations in BARs. | Gabe Black |
| 2008-12-15 | PCI: Add some missing breaks to a couple case statements. | Gabe Black |
| 2008-10-09 | eventq: convert all usage of events to use the new API. | Nathan Binkert |
| 2008-09-10 | style: Remove non-leading tabs everywhere they shouldn't be. Developers shoul... | Ali Saidi |
| 2007-08-16 | PCI: Move PCI Configuration data into devices now that we can inherit paramet... | Ali Saidi |
| 2007-08-16 | Devices: Make EtherInts connect in the same way memory ports currently do. | Ali Saidi |
| 2007-07-26 | Merge python and x86 changes with cache branch | Nathan Binkert |
| 2007-07-23 | Major changes to how SimObjects are created and initialized. Almost all | Nathan Binkert |
| 2007-06-30 | Can only call makeAtomicResponse() once... | Steve Reinhardt |
| 2007-06-30 | Get rid of Packet result field. Error responses are | Steve Reinhardt |
| 2007-05-21 | Change getDeviceAddressRanges to use bool for snoop arg. | Steve Reinhardt |
| 2007-03-06 | Move all of the parameters of the Root SimObject so they are | Nathan Binkert |
| 2006-11-10 | fix endian issues with condition codes | Ali Saidi |
| 2006-11-06 | Moved the tsunami devices into the dev/alpha directory. Other devices "generi... | Gabe Black |
| 2006-10-20 | Use PacketPtr everywhere | Nathan Binkert |
| 2006-10-19 | refactor code for the packet, get rid of packet_impl.hh | Nathan Binkert |
| 2006-10-08 | post checkpoint restoration the bus ranges need to be re-initialized for ALL ... | Lisa Hsu |
| 2006-09-18 | add boiler plate intel nic code | Ali Saidi |
| 2006-08-30 | Move more common functionality into SimpleTimingPort, | Steve Reinhardt |
| 2006-08-30 | Minor include file & formatting cleanup. | Steve Reinhardt |
| 2006-08-28 | Clean up BAR setting code. | Steve Reinhardt |
| 2006-08-28 | Get rid of unneeded union. | Steve Reinhardt |
| 2006-08-28 | Get rid of unused BARAddrs[] in PciConfigData object. | Steve Reinhardt |
| 2006-08-28 | Cleanup: formatting, comments, DPRINTFs. | Steve Reinhardt |
| 2006-07-12 | memory mode information now contained in system object | Ali Saidi |
| 2006-07-06 | Add default responder to bus | Ali Saidi |
| 2006-05-31 | Updated Authors from bk prs info | Ali Saidi |
| 2006-05-22 | New directory structure: | Steve Reinhardt |
