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path: root/src/dev/x86
AgeCommit message (Expand)Author
2016-02-06style: remove trailing whitespaceSteve Reinhardt
2015-12-05dev: Rewrite PCI host functionalityAndreas Sandberg
2015-10-23x86: Add missing explicit overrides for X86 devicesAndreas Hansson
2015-10-12misc: Remove redundant compiler-specific definesAndreas Hansson
2015-09-30isa,cpu: Add support for FS SMT InterruptsMitch Hayenga
2015-09-29arch, x86: Delete packet in IntDevice::recvResponseJoel Hestness
2015-08-07dev, x86: Fix serialization bug in the i8042 deviceAndreas Sandberg
2015-07-07sim: Refactor the serialization base classAndreas Sandberg
2015-02-11mem: Clarification of packet crossbar timingsMarco Balboni
2015-01-06dev: prevent intel 8254 timer counter events firing before startupcdirik
2015-01-03dev: prevent RTC events firing before startupCagdas Dirik
2014-11-21x86: pc: Put a stub IO device at port 0xed which the kernel can use for delays.Gabe Black
2014-09-20mem: Rename Bus to XBar to better reflect its behaviourAndreas Hansson
2014-09-03dev: seperate legacy io offsets from PCI offsetAli Saidi
2014-07-18x86: make PioBus return BadAddress errorsBinh Pham
2013-11-25sim: simulate with multiple threads and event queuesSteve Reinhardt ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E%2C%20Ali%20Saidi%20%3CAli.Saidi%40ARM.com%3E)
2013-07-11dev: make BasicPioDevice take size in constructorSteve Reinhardt
2013-07-11dev: consistently end device classes in 'Device'Steve Reinhardt
2013-07-11devices: make more classes derive from BasicPioDeviceSteve Reinhardt
2013-03-28x86: changes to apic, keyboardNilay Vaish
2013-02-19scons: Fix warnings issued by clang 3.2svn (XCode 4.6)Andreas Hansson
2013-02-19mem: Enforce strict use of busFirst- and busLastWordTimeAndreas Hansson
2013-02-15sim: Add a system-global option to bypass cachesAndreas Sandberg
2012-11-02sim: Include object header files in SWIG interfacesAndreas Sandberg
2012-10-15Port: Add protocol-agnostic ports in the port hierarchyAndreas Hansson
2012-10-15Fix: Address a few minor issues identified by cppcheckAndreas Hansson
2012-09-19AddrRange: Transition from Range<T> to AddrRangeAndreas Hansson
2012-08-22Port: Extend the QueuedPort interface and use where appropriateAndreas Hansson
2012-08-21Device: Remove overloaded pio_latency parameterAndreas Hansson
2012-07-09Port: Make getAddrRanges constAndreas Hansson
2012-04-05Config: corrects the way Ruby attaches to the DMA portsNilay Vaish
2012-03-30MEM: Introduce the master/slave port sub-classes in C++William Wang
2012-03-22MEM: Split SimpleTimingPort into PacketQueue and portsAndreas Hansson
2012-02-24MEM: Prepare mport for master/slave splitAndreas Hansson
2012-02-24MEM: Move port creation to the memory object(s) constructionAndreas Hansson
2012-02-13MEM: Introduce the master/slave port roles in the Python classesAndreas Hansson
2012-01-28Merge with the main repo.Gabe Black
2012-01-17MEM: Removing the default port peer from Python portsAndreas Hansson
2012-01-17MEM: Separate queries for snooping and address rangesAndreas Hansson
2011-11-18SE/FS: Get rid of includes of config/full_system.hh.Gabe Black
2011-10-09Interrupts: Make the IO APIC go get the local APICs.Gabe Black
2011-09-30SE/FS: Remove System::platform and Platform::intrFrequency.Gabe Black
2011-09-30SE/FS: Build the devices in SE mode.Gabe Black
2011-06-02scons: rename TraceFlags to DebugFlagsNathan Binkert
2011-05-23config: revamp x86 config to avoid appending to SimObjectVectorsSteve Reinhardt
2011-04-15trace: reimplement the DTRACE function so it doesn't use a vectorNathan Binkert
2011-04-15includes: sort all includesNathan Binkert
2011-02-06dev: fixed bugs to extend interrupt capability beyond 15 coresBrad Beckmann
2011-02-06x86: Add checkpointing capability to devicesJoel Hestness
2011-02-06MessagePort: implement the virtual recvTiming function to avoid double pkt de...Joel Hestness
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