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AgeCommit message (Expand)Author
2019-10-15dev-arm: Carve out a portion of VExpress_GEM5 for the bootloaderGiacomo Travaglini
2019-10-15x86: De-x86ify the IntMasterPort.Gabe Black
2019-10-14x86: Simplify and consolidate the code that assembles an MSI on x86.Gabe Black
2019-10-12x86: Stop using and delete the x86 IntDevice class.Gabe Black
2019-10-10dev-arm, configs: Remove RealViewPBX platformGiacomo Travaglini
2019-10-03dev, misc: Fixing "may be used unitialized" compilation errorBobby R. Bruce
2019-10-02dev-arm: Improve fault message on SMMUv3 translation faultMarc Mari Barcelo
2019-10-02dev-arm: Fix address used to update the SMMUv3 Walk CacheMarc Mari Barcelo
2019-10-02x86: Switch from MessageReq and Resp to WriteReq and Resp.Gabe Black
2019-09-21x86: Templatize the IntMasterPort.Gabe Black
2019-09-21x86: Templatize IntSlavePort.Gabe Black
2019-09-20dev, x86: Delete the now unused X86 specific interrupt pins/lines.Gabe Black
2019-09-20dev, x86: Convert x86 devices to the generic int pins.Gabe Black
2019-09-19dev: Terminal output's dump name conflictsAndrea Mondelli
2019-09-19dev-arm: Conditionally enable HDLcd when doing DTB autogenGiacomo Travaglini
2019-09-19dev-arm: Add HDLcd DTB autogenerationGiacomo Travaglini
2019-09-16dev-arm: Allow IOMMU binding to HDLcdGiacomo Travaglini
2019-09-13dev-arm: Store the IOMMU reference from within the SMMU::connectGiacomo Travaglini
2019-09-13dev: Enable DTB IOMMU binding with a DMA objectGiacomo Travaglini
2019-09-12dev: Generalize the x86 int source/sink pins.Gabe Black
2019-09-09dev-arm: Reset HPPI when clearing an LPIGiacomo Travaglini
2019-09-09dev-arm: Add resetHppi method in the GICv3 cpu interfaceGiacomo Travaglini
2019-09-09dev-arm: Cleanup GICv3 initializationGiacomo Travaglini
2019-09-09dev-arm: Initialize GICD_TYPER once at construction timeGiacomo Travaglini
2019-09-09dev-arm: Writes to IGRPEN1_EL3 triggering updateGiacomo Travaglini
2019-09-09dev-arm: Fix GICv3 ITS cmdq wrappingGiacomo Travaglini
2019-09-09dev-arm: Fix mapping between IGRPEN1_EL3 and IGRPEN1_EL1Giacomo Travaglini
2019-09-09dev-arm: Implement message-based SPIsGiacomo Travaglini
2019-09-09dev: Scrub out some lingering uses of MemObject.Gabe Black
2019-09-07dev-arm: Add GICD_SGIR registerGiacomo Travaglini
2019-09-06dev: Enable Terminal output's dump to stdoutGiacomo Travaglini
2019-09-06dev-arm: State update when setting MISCREG_ICC_IGRPENx registerGiacomo Travaglini
2019-09-06arch-arm, dev-arm: MISCREG_ICC_IGRPEN1_EL1 using AA64 bankingGiacomo Travaglini
2019-09-06arch-arm, dev-arm: MISCREG_ICC_AP1R0_EL1 using AA64 bankingGiacomo Travaglini
2019-09-06arch-arm, dev-arm: MISCREG_ICC_CTLR_EL1 using AA64 bankingGiacomo Travaglini
2019-09-06dev-arm: Add read/writeBanked helpers to GICv3Giacomo Travaglini
2019-09-06dev: Fix segmentation fault in VirtIOBlockChun-Chen TK Hsu
2019-09-06dev-arm: Rewrite ICC_BPR0/ICC_BPR1 handlingGiacomo Travaglini
2019-09-06dev-arm: Add GICv3 unimplemented Hyp Active Priorities Group regsGiacomo Travaglini
2019-09-06dev-arm: Allow 32-bit access to GITS_TYPERGiacomo Travaglini
2019-09-06dev-arm: Cpu interface groupEnabled check for global enableGiacomo Travaglini
2019-09-06dev-arm: Check if INTID group is enabled when reading HPPIRxGiacomo Travaglini
2019-09-06dev-arm: Writing GICD_CTLR should trigger an updateGiacomo Travaglini
2019-09-06dev-arm: Rewrite GICv3 updateGiacomo Travaglini
2019-09-06dev-arm: Fix GICv3 IGRPMOD writesGiacomo Travaglini
2019-09-06dev-arm: Fix SGI generationGiacomo Travaglini
2019-09-06dev-arm: Gicv3 ITS device tree autogenAdrian Herrera
2019-09-06dev-arm: modify GICv3 ITS default addrAdrian Herrera
2019-09-05dev-arm: Improper translation slot release in SMMUv3Giacomo Travaglini
2019-09-05dev-arm: Implement invalidateASID in SMMUv3 WalkCacheJan-Peter Larsson