| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2010-06-03 | Act like enabling CPUs is no big deal, | Steve Reinhardt | |
| rather than a scary thing that might not work. | |||
| 2010-06-02 | DMA: Make DmaPort generic enough to be used other places | Ali Saidi | |
| 2010-06-02 | ARM: Adjust some copyrights | Ali Saidi | |
| 2010-04-15 | tick: rename Clock namespace to SimClock | Nathan Binkert | |
| 2010-02-28 | uart: use integer versions of time instead of messing around with floats | Nathan Binkert | |
| 2009-12-19 | X86: Add a latency that describes how long an interrupt takes to propagate ↵ | Gabe Black | |
| through the IO APIC. | |||
| 2009-11-18 | m5: removed master and slave deletions. | Brad Beckmann | |
| The unresolved destructor call caused a seg fault when called. | |||
| 2009-11-18 | m5: fixed destructor to deschedule the tickEvent and event | Brad Beckmann | |
| 2009-11-17 | ARM: Boilerplate full-system code. | Ali Saidi | |
| --HG-- rename : src/arch/sparc/interrupts.hh => src/arch/arm/interrupts.hh rename : src/arch/sparc/kernel_stats.hh => src/arch/arm/kernel_stats.hh rename : src/arch/sparc/stacktrace.cc => src/arch/arm/stacktrace.cc rename : src/arch/sparc/system.cc => src/arch/arm/system.cc rename : src/arch/sparc/system.hh => src/arch/arm/system.hh rename : src/dev/sparc/T1000.py => src/dev/arm/Versatile.py rename : src/dev/sparc/t1000.cc => src/dev/arm/versatile.cc rename : src/dev/sparc/t1000.hh => src/dev/arm/versatile.hh | |||
| 2009-11-04 | build: fix compile problems pointed out by gcc 4.4 | Nathan Binkert | |
| 2009-10-15 | fixed MC146818 checkpointing bug and added isa serialization calls to ↵ | Brad Beckmann | |
| simple_thread | |||
| 2009-09-23 | arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh | Nathan Binkert | |
| 2009-09-22 | python: Move more code into m5.util allow SCons to use that code. | Nathan Binkert | |
| Get rid of misc.py and just stick misc things in __init__.py Move utility functions out of SCons files and into m5.util Move utility type stuff from m5/__init__.py to m5/util/__init__.py Remove buildEnv from m5 and allow access only from m5.defines Rename AddToPath to addToPath while we're moving it to m5.util Rename read_command to readCommand while we're moving it Rename compare_versions to compareVersions while we're moving it. --HG-- rename : src/python/m5/convert.py => src/python/m5/util/convert.py rename : src/python/m5/smartdict.py => src/python/m5/util/smartdict.py | |||
| 2009-08-20 | RTC: Make calls to writeData update the RTCs internal representation of time. | Gabe Black | |
| 2009-08-20 | X86: Make the real time clock actually keep track of time. | Gabe Black | |
| 2009-08-20 | X86: Don't insist on binary encoding for the RTC since we implement BCD. | Gabe Black | |
| 2009-08-17 | X86: Move the simulated date in X86_FS forward to 2012. | Gabe Black | |
| 2009-08-02 | X86: Set up the IDE device correctly, ie. with and using legacy ports. | Gabe Black | |
| 2009-08-02 | IDE: Configure the IDE control to reflect the initial value of the command ↵ | Gabe Black | |
| register. | |||
| 2009-07-21 | MIPS: Get MIPS_FS to compile, more style fixes. | Gabe Black | |
| Some breakage was from my BitUnion change, some was much older. | |||
| 2009-07-02 | typo: correct spelling | Nathan Binkert | |
| 2009-06-05 | types: need typename keyword to get the type. | Nathan Binkert | |
| 2009-06-04 | types: clean up types, especially signed vs unsigned | Nathan Binkert | |
| 2009-05-20 | igbe: Fix descriptor cache bug. | Steve Reinhardt | |
| 2009-05-17 | includes: sort includes again | Nathan Binkert | |
| 2009-05-17 | types: Move stuff for global types into src/base/types.hh | Nathan Binkert | |
| --HG-- rename : src/sim/host.hh => src/base/types.hh | |||
| 2009-04-26 | X86: Implement lowest priority interrupts more correctly. | Gabe Black | |
| Lowest priority interrupts are now delivered based on a rotating offset into the list of potential recipients. There could be parasitic cases were a processor gets picked on and ends up at that rotating offset all the time, but it's much more likely that the group will stay consistent and the pain will be distributed evenly. | |||
| 2009-04-26 | X86: Tell the function that sends int messages who to send to instead of ↵ | Gabe Black | |
| figuring it out itself. | |||
| 2009-04-26 | X86: Make the local APICs register themselves with the IO APIC. | Gabe Black | |
| This is a hack so that the IO APIC can figure out information about the local APICs. The local APICs still have no way to find out about each other. Ideally, when the local APICs update state that's relevant to somebody else, they'd send an update to everyone. Without being able to do a broadcast, that would still require knowing who else there is to notify. Other broadcasts are implemented using assumptions that may not always be true. | |||
| 2009-04-26 | X86: Record the initial APIC ID which identifies an APIC in M5. | Gabe Black | |
| The ID as exposed to software can be changed. Tracking those changes in M5 would be cumbersome, especially since there's no guarantee the IDs will remain unique. | |||
| 2009-04-26 | X86, Config: Make makeX86System consider the number of CPUs, and clean up ↵ | Gabe Black | |
| interrupt assignment. | |||
| 2009-04-22 | i8254xGBe: major style overhaul. | Steve Reinhardt | |
| Moved DescCache template functions from .hh to .cc file. Also fixed lots of line-wrapping problems, and some irregular indentation. | |||
| 2008-07-16 | mem: use single BadAddr responder per system. | Steve Reinhardt | |
| Previously there was one per bus, which caused some coherence problems when more than one decided to respond. Now there is just one on the main memory bus. The default bus responder on all other buses is now the downstream cache's cpu_side port. Caches no longer need to do address range filtering; instead, we just have a simple flag to prevent snoops from propagating to the I/O bus. | |||
| 2009-04-19 | X86: Mask the PIC at startup to avoid a glitch which causes an NMI. | Gabe Black | |
| 2009-04-19 | X86: Keep track of what the initial count value was in the LAPIC timer. | Gabe Black | |
| 2009-04-19 | X86: Add a function which gets called when an interrupt message has been ↵ | Gabe Black | |
| delivered. | |||
| 2009-04-19 | X86: Make code that sends an interrupt from the IO APIC available for IPIs. | Gabe Black | |
| 2009-04-08 | alpha: get rid of all turbolaser remnants | Nathan Binkert | |
| 2009-03-25 | CPA: Fix a typo that managed to sneak in. | Ali Saidi | |
| 2009-03-05 | stats: Fix all stats usages to deal with template fixes | Nathan Binkert | |
| 2009-02-26 | CPA: Add annotations to IGbE and CopyEngine device models. | Ali Saidi | |
| 2009-02-25 | Devices: Make the RTC device reflect the use of BCD in its status registers. | Gabe Black | |
| 2009-02-25 | X86: Add makeAtomicResponse to the read/write functions of x86 devices. | Gabe Black | |
| 2009-02-23 | debug: Move debug_break into src/base | Nathan Binkert | |
| 2009-02-17 | Make etherdump timestamps zero-based. | Steve Reinhardt | |
| We previously used the actual wall time for the base timestamps, making etherdumps non-deterministic. This fixes that problem and gets rid of the "malformed packet" at the front that we needed to provide the right base timestamp to wireshark/tcpdump. | |||
| 2009-02-01 | X86: Add some missing default arguments. | Gabe Black | |
| 2009-02-01 | X86: Implement pciToDma. | Gabe Black | |
| 2009-02-01 | X86: Configure the first PCI interrupt. | Gabe Black | |
| 2009-02-01 | X86: Hook up the IDE controller interrupt line. | Gabe Black | |
| 2009-02-01 | Devices: Add support for legacy fixed IO locations in BARs. | Gabe Black | |
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