Age | Commit message (Collapse) | Author |
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--HG--
extra : convert_revision : 8fb7d5fad5cb840f69c31aa8b331dbe09e46ee9d
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Make OutputDirectory::resolve() private and change the functions using
resolve() to instead use create().
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extra : convert_revision : 36d4be629764d0c4c708cec8aa712cd15f966453
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extra : convert_revision : 3f93c17f647a6955dab861da211174de856ee02c
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extra : convert_revision : a614373236fe75db6e6181fc152a02b541a131f3
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extra : convert_revision : 1e7f5185654ed0845678c2169c702d3b977159ed
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extra : convert_revision : c0416de5d88ca39f54494418768e68a93aa4f2aa
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extra : convert_revision : 92918c05eb3363155d78889bdab17baa8eae9dca
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extra : convert_revision : 2c6ffebbad04a21cef6ba3fbc1803218908a6c37
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extra : convert_revision : 02775cfb460afe6df0df0938c62cccd93a71e775
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scheme.
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extra : convert_revision : 2b382f478ee8cde3a35aa4c105196f200bc7afa6
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extra : convert_revision : a1f16bd82b6fbd5b6b5dc0f08b9e69858bea86ca
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extra : convert_revision : c7768d54d3f78685e93920069f5485083ca989c0
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extra : convert_revision : d4e19afda897bc3797868b40469ce2ec7ec7d251
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file with them all.
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extra : convert_revision : 427f6bd8f050861ace3bc0d354a1afa5fc8319e6
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extra : convert_revision : 10ec3484647b3acb8e821f8520f97d535e41e861
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extra : convert_revision : 7d64d3e78960f3bb937579f5d10937bed5f197be
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extra : convert_revision : 3d95f6daa7f0e8e376d1a880f64c056619263885
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extra : convert_revision : 790eddb793d4f5ba35813d001037bd8601bd76a5
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extra : convert_revision : fb973bcf13648876d5691231845dd47a2be50f01
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extra : convert_revision : 14306d3cd79bbef7decdf2fd370ed7e7f2b10a93
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extra : convert_revision : bfc0ac8e1c8a5d01d9fa5203184bbf99c8361da3
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--HG--
extra : convert_revision : 2c6710e01a4402793a2e0eafcc829df19d03dda3
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SimObjects not yet updated:
- Process and subclasses
- BaseCPU and subclasses
The SimObject(const std::string &name) constructor was removed. Subclasses
that still rely on that behavior must call the parent initializer as
: SimObject(makeParams(name))
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extra : convert_revision : d6faddde76e7c3361ebdbd0a7b372a40941c12ed
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extra : convert_revision : cc73b9aaf73e9dacf52f3350fa591e67ca4ccee6
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parameters.
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extra : convert_revision : bd2214b28fb46a9a9e9e204e0539be33acb548ad
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extra : convert_revision : 765b096785a77df9adc4791c9101b90696bd7be2
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way so a cache can handle partial block requests for i/o devices.
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extra : convert_revision : a68b5ae826731bc87ed93eb7ef326a2393053964
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extra : convert_revision : e06a950964286604274fba81dcca362d75847233
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creation and initialization now happens in python. Parameter objects
are generated and initialized by python. The .ini file is now solely for
debugging purposes and is not used in construction of the objects in any
way.
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extra : convert_revision : 7e722873e417cb3d696f2e34c35ff488b7bff4ed
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--HG--
extra : convert_revision : f99a33b2df6a6c5592856d17d00e73ee83267442
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Note that we should *not* print pointer values in DPRINTFs as
these needlessly clutter tracediff output.
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extra : convert_revision : 25a448f1b3ac8d453a717a104ad6dc0112fb30bb
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extra : convert_revision : c49aade46aa64f979da35eb653b544ee5bd82f01
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(they function as adjectives not nouns)
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extra : convert_revision : 6506474ff3356ae8c80ed276c3608d8a4680bfdb
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now encoded in cmd field.
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extra : convert_revision : d67819b7e3ee4b9a5bf08541104de0a89485e90b
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supposed to and make sure parameters have the right type.
Also make sure that any object that should be an intermediate
type has the right options set.
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extra : convert_revision : d56910628d9a067699827adbc0a26ab629d11e93
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the SConscript files so that only the objects that are
actually available in a given build are compiled in.
Remove a bunch of files that aren't used anymore.
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rename : src/python/m5/objects/AlphaTLB.py => src/arch/alpha/AlphaTLB.py
rename : src/python/m5/objects/SparcTLB.py => src/arch/sparc/SparcTLB.py
rename : src/python/m5/objects/BaseCPU.py => src/cpu/BaseCPU.py
rename : src/python/m5/objects/FuncUnit.py => src/cpu/FuncUnit.py
rename : src/python/m5/objects/IntrControl.py => src/cpu/IntrControl.py
rename : src/python/m5/objects/MemTest.py => src/cpu/memtest/MemTest.py
rename : src/python/m5/objects/FUPool.py => src/cpu/o3/FUPool.py
rename : src/python/m5/objects/FuncUnitConfig.py => src/cpu/o3/FuncUnitConfig.py
rename : src/python/m5/objects/O3CPU.py => src/cpu/o3/O3CPU.py
rename : src/python/m5/objects/OzoneCPU.py => src/cpu/ozone/OzoneCPU.py
rename : src/python/m5/objects/SimpleOzoneCPU.py => src/cpu/ozone/SimpleOzoneCPU.py
rename : src/python/m5/objects/BadDevice.py => src/dev/BadDevice.py
rename : src/python/m5/objects/Device.py => src/dev/Device.py
rename : src/python/m5/objects/DiskImage.py => src/dev/DiskImage.py
rename : src/python/m5/objects/Ethernet.py => src/dev/Ethernet.py
rename : src/python/m5/objects/Ide.py => src/dev/Ide.py
rename : src/python/m5/objects/Pci.py => src/dev/Pci.py
rename : src/python/m5/objects/Platform.py => src/dev/Platform.py
rename : src/python/m5/objects/SimConsole.py => src/dev/SimConsole.py
rename : src/python/m5/objects/SimpleDisk.py => src/dev/SimpleDisk.py
rename : src/python/m5/objects/Uart.py => src/dev/Uart.py
rename : src/python/m5/objects/AlphaConsole.py => src/dev/alpha/AlphaConsole.py
rename : src/python/m5/objects/Tsunami.py => src/dev/alpha/Tsunami.py
rename : src/python/m5/objects/T1000.py => src/dev/sparc/T1000.py
rename : src/python/m5/objects/Bridge.py => src/mem/Bridge.py
rename : src/python/m5/objects/Bus.py => src/mem/Bus.py
rename : src/python/m5/objects/MemObject.py => src/mem/MemObject.py
rename : src/python/m5/objects/PhysicalMemory.py => src/mem/PhysicalMemory.py
rename : src/python/m5/objects/BaseCache.py => src/mem/cache/BaseCache.py
rename : src/python/m5/objects/CoherenceProtocol.py => src/mem/cache/coherence/CoherenceProtocol.py
rename : src/python/m5/objects/Repl.py => src/mem/cache/tags/Repl.py
rename : src/python/m5/objects/Process.py => src/sim/Process.py
rename : src/python/m5/objects/Root.py => src/sim/Root.py
rename : src/python/m5/objects/System.py => src/sim/System.py
extra : convert_revision : 173f8764bafa8ef899198438fa5573874e407321
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--HG--
extra : convert_revision : 832e52ba80cbab2f5bb6d5b5977a499d41b4d638
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and schedules the event immediately.
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extra : convert_revision : a84e729a5ef3632cbe6cff858c453c782707d983
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src/dev/i8254xGBe.cc:
src/dev/i8254xGBe.hh:
couple more bug fixes
--HG--
extra : convert_revision : ae5b806528c1ec06f0091e1f6e50fc0721057ddb
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src/dev/io_device.cc:
extra printing and assertions
src/mem/bridge.hh:
deal with packets only satisfying part of a request by making many requests
src/mem/cache/cache_impl.hh:
make the cache try to satisfy a functional request from the cache above it before checking itself
--HG--
extra : convert_revision : 1df52ab61d7967e14cc377c560495430a6af266a
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--HG--
extra : convert_revision : da68e5e6411000d9d5247f769ee528a443286c61
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--HG--
extra : convert_revision : 8c18b2513d638f67cc096e7f1483b47390a374ca
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add seperate response buffers and request queue sizes in bus bridge
add delay to respond to a nack in the bus bridge
src/dev/i8254xGBe.cc:
src/dev/ide_ctrl.cc:
src/dev/ns_gige.cc:
src/dev/pcidev.hh:
src/dev/sinic.cc:
add backoff delay parameters
src/dev/io_device.cc:
src/dev/io_device.hh:
add a backoff algorithm when nacks are received.
src/mem/bridge.cc:
src/mem/bridge.hh:
add seperate response buffers and request queue sizes
add a new parameters to specify how long before a nack in ready to go after a packet that needs to be nacked is received
src/mem/cache/cache_impl.hh:
assert on the
src/mem/tport.cc:
add a friendly assert to make sure the packet was inserted into the list
--HG--
extra : convert_revision : 3595ad932015a4ce2bb72772da7850ad91bd09b1
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extra : convert_revision : 4c5e9c2145b12fdeba91f3fdd8963c35abe326c2
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extra : convert_revision : 01ffc08f5c1ec827a42f60562ae7e10176ffdb7f
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--HG--
extra : convert_revision : 5481b72b22e7a2cf3367d777309bc30201f3b1fc
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--HG--
extra : convert_revision : 0dc0c4c4546869261f4508ad22a6a85aecf3c334
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--HG--
extra : convert_revision : c82a62a61650e3700d237da917c453e5a9676320
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