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Age
Commit message (
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Author
2007-08-16
PCI: Move PCI Configuration data into devices now that we can inherit paramet...
Ali Saidi
2007-08-16
Devices: Make EtherInts connect in the same way memory ports currently do.
Ali Saidi
2007-08-10
DMA: Add IOCache and fix bus bridge to optionally only send requests one
Ali Saidi
2007-07-26
Merge python and x86 changes with cache branch
Nathan Binkert
2007-07-23
Major changes to how SimObjects are created and initialized. Almost all
Nathan Binkert
2007-07-14
Merge of DPRINTF fixes from head.
Steve Reinhardt
2007-07-14
Fix & tweak DPRINTFs for tracediff w/new cache code.
Steve Reinhardt
2007-06-30
Can only call makeAtomicResponse() once...
Steve Reinhardt
2007-06-30
Event descriptions should not end in "event"
Steve Reinhardt
2007-06-30
Get rid of Packet result field. Error responses are
Steve Reinhardt
2007-06-20
Make sure all parameters have default values if they're
Nathan Binkert
2007-05-27
Move SimObject python files alongside the C++ and fix
Nathan Binkert
2007-05-21
Change getDeviceAddressRanges to use bool for snoop arg.
Steve Reinhardt
2007-05-20
Add new EventWrapper constructor that takes a Tick value
Steve Reinhardt
2007-05-14
couple more bug fixes for intel nic
Ali Saidi
2007-05-14
add uglyiness to fix dmas
Ali Saidi
2007-05-09
couple of updates in the intel nic
Ali Saidi
2007-05-09
update for new reschedule semantics
Ali Saidi
2007-05-09
add a backoff algorithm when nacks are received by devices
Ali Saidi
2007-05-01
initialize lastTxInt to 0
Ali Saidi
2007-04-30
fix igbe bug
Ali Saidi
2007-04-30
fix console printing bug
Ali Saidi
2007-04-30
add the ability for the ethernet device to check if the link is busy
Ali Saidi
2007-04-21
fixes for solaris compile
Ali Saidi
2007-03-29
make serialization at least seem to work
Ali Saidi
2007-03-27
some more fixes... non-tso stuff seems to work
Ali Saidi
2007-03-26
first bit of life from the intel gigabit model
Ali Saidi
2007-03-22
finish up the coding of the Intel Gb NIC... Many Many bugs to squash
Ali Saidi
2007-03-15
add all the registers we'll need to support for the Intel GbE device and supp...
Ali Saidi
2007-03-13
fix interrupting during a quisce on sparc
Ali Saidi
2007-03-10
Rework the way SCons recurses into subdirectories, making it
Nathan Binkert
2007-03-10
Compilation fix
Gabe Black
2007-03-09
implement ipi stufff for SPARC
Ali Saidi
2007-03-06
Move all of the parameters of the Root SimObject so they are
Nathan Binkert
2007-03-03
add a sparc fs regression
Ali Saidi
2007-03-03
Add Iob and remove the fake device
Ali Saidi
2007-03-03
Implement Niagara I/O interface and rework interrupts
Ali Saidi
2007-02-21
Get rid of the ConsoleListener SimObject and just fold the
Nathan Binkert
2007-02-21
Make sure that all variables in the NSGigE device model are
Nathan Binkert
2007-02-13
Make mulitple consoles work and be distinguishable from each other
Ali Saidi
2007-02-07
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
Steve Reinhardt
2007-02-07
Make memory commands dense again to avoid cache stat table explosion.
Steve Reinhardt
2007-02-06
more fp fixes
Ali Saidi
2007-01-30
Make SPARC checkpointing work
Ali Saidi
2007-01-29
timegm() is a gnuism... replace with the code from the timegm() man page
Ali Saidi
2007-01-28
Stick the conversion of python to unix time with all of
Nathan Binkert
2007-01-26
Merge zizzer:/bk/newmem
Ali Saidi
2007-01-26
Merge zeep.pool:/z/saidi/work/m5.newmem
Ali Saidi
2007-01-26
make our code a little more standards compliant
Ali Saidi
2007-01-25
Instead of passing an int to represent time between python and C++
Nathan Binkert
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