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2018-04-17ps2: Implement the keyboard reset commandAndreas Sandberg
Linux tries to reset the PS/2 keyboard at boot. Change-Id: I727fbf6138b654885d82d85be9d964ee3d3365ef Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/9766 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-04-17ps2: Unify device data bufferingAndreas Sandberg
All PS/2 device currently implement various ad-hoc mechanisms to handle multi-byte commands. This is error-prone and makes it hard to implement new devices. Create a buffering mechanism in the base class to avoid this. Change-Id: If5638b0ab68decea8de7631ecead0a9ebad1547b Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/9765 Reviewed-by: Gabe Black <gabeblack@google.com>
2018-04-17ps2: Add a simple touchscreen modelAndreas Sandberg
Add a touchscreen model that is compatible with Linux's TouchKit driver. This model is based on the model in the Arm PL050 KMI model. Change-Id: Id4d88a21a26bb42c455e4d778cd89875f650ac57 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/9764 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-04-17ps2: Add VNC support to the keyboard modelAndreas Sandberg
Add support for keyboard input from the VNC server in the PS/2 keyboard model. The introduced code is based on the functionality in the Arm PL050 KMI model. Change-Id: If04a9713e5a15e2149d1a7471b999e3060d8ee7d Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/9763 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-04-17ps2: Factor out PS/2 devices into their own subsystemAndreas Sandberg
PS/2 devices are currently emulated both in the i8042 model and the Arm KMI model. This is undesirable since it leads to code duplication. This change introduces a common PS/2 device interface and factor out the x86 keyboard and mouse model. A subsequent commit will implement support for this interface in the Arm KMI model. Change-Id: I440e83517fd9dce362fdc1676db477cc6eee5211 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/9762 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-04-10dev: arm: SetScaling commands don't send parameter bytes.Gabe Black
These are single byte commands which change the mode of the mouse. They don't take any additional parameters like the SetRate or SetResolution. Change-Id: I29194916cfed5d3f4893947ef6d6cc636aee2419 Reviewed-on: https://gem5-review.googlesource.com/9701 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-04-05dev: Make sure the EtherTap device uses the right event queue.Gabe Black
The EtherTap device may be called into from an event on the PollQueue when some event queue other than its own is active. This change ensures that it switches event queues if necessary before doing anything that may cause more events to be scheduled. Change-Id: If8666542d7664780c0b371230e1e5fba93fbc1c0 Reviewed-on: https://gem5-review.googlesource.com/9521 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-03-27dev: sparc: Get rid of the TheISA namespace in the SPARC devices.Gabe Black
It's not used, and so doesn't need to be brought in with a "using" statement. Change-Id: Iff4f7c66dbf1ee18e2e1a7d3e73bbae8cc4bf8eb Reviewed-on: https://gem5-review.googlesource.com/9406 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-03-27dev: Remove a bunch of Alpha code from MIPS, and unnecessary TheISAs.Gabe Black
There was a bunch of commented out code in the MIPS malta implementation which originally came from Alpha. That code is now deleted. Also, the MIPS code pulled in the TheISA namespace which it didn't use. Change-Id: I8470cc2fecb302f4399e52de4de9daf79c00a711 Reviewed-on: https://gem5-review.googlesource.com/9405 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-03-20arch-arm, configs: Treat the bootloader rom as cacheable memoryNikos Nikoleris
Prior to this changeset the bootloader rom (instantiated as a SimpleMemory) in ruby Arm systems was treated as an IO device and it was fronted by a DMA controller. This changeset moves the bootloader rom and adds it to the system as another memory with a dedicated directory controller. Change-Id: I094fed031cdef7f77a939d94f948d967b349b7e0 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/8741 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2018-03-06dev: Don't fall through into BRAR after RFDR caseSiddhesh Poyarekar
If the switch block inside the RFDR case selects the non-default case and breaks out, it will fall through into the BRAR case, which seems incorrect. Put in a break to ensure that it breaks out of the parent switch block as well. Change-Id: Ie4cedf66954b7e8f4b884ad9e3a653968bbfaef7 Signed-off-by: Siddhesh Poyarekar <siddhesh.poyarekar@gmail.com> Reviewed-on: https://gem5-review.googlesource.com/8563 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-03-06dev: Leave last byte in strncpy for NULLSiddhesh Poyarekar
The length of the strncpy should be one less than the destination to ensure that there is space for the last NULL byte in case the source is longer than the destination. Change-Id: Iea65fa6327c8242bd8ddf4bf9a5a2b5164996495 Signed-off-by: Siddhesh Poyarekar <siddhesh.poyarekar@gmail.com> Reviewed-on: https://gem5-review.googlesource.com/8561 Reviewed-by: Gabe Black <gabeblack@google.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-02-24sparc: Fix FS Checkpoint loadingKhalique
Proposed changes to SPARC FS simulation, testing indicates that checkpoints are now loaded correctly with the following command: build/SPARC/gem5.opt configs/example/fs.py -r 1 Change-Id: Icd44f01a74c41a78828ef6fd7b661e584bdb6966 Reviewed-on: https://gem5-review.googlesource.com/8581 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-02-13dev: Remove unused interrupt controller in TerminalAndreas Sandberg
Change-Id: I412d0b5edf2a08217792fa2ed1e511c17d3d31d4 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jack Travaglini <giacomo.travaglini@arm.com> Reviewed-on: https://gem5-review.googlesource.com/8141 Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2018-02-09dev: Fix i8042 device errorsJason Lowe-Power
The patch that added M5_FALLTHROUGH (5c41076bd7610 misc: Updates for gcc7.2 for x86) incorrectly added breaks to the i8042 device without implementing the correct functions. This patch implements keyboard writes, but ignores output writes. Information on the PS2 controller can be found at https://wiki.osdev.org/%228042%22_PS/2_Controller Note: Without this patch Linux 4.14 won't boot. Change-Id: I7de137b46cef00e6c1f1c14335cb52107cd7fe5b Signed-off-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-on: https://gem5-review.googlesource.com/7301 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-01-29arm: DT autogeneration - generate PCI nodeGlenn Bergmans
Enables automatic generation of Device Trees for RealView PCI host controllers. Note that some parts are more hard coded than you'd want, but this is due to the limited understanding the PCI host has of its configuration (i.e. it doesn't know all memory ranges). Fixing this, for now at least, went beyond the scope and intentions of the Device Tree generating code: use with care! Change-Id: I2041871e0eb4d04fb5191257c47dd38649d1c0cc Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5967 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-01-29arm: DT autogeneration - Generate energy controller nodeGlenn Bergmans
Adds Device Tree methods for the energy controller to allow for DVFS simulations with automatically generated DTB files Change-Id: Id8682f07dff1bbe63987e757faa0694e03ee86ab Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5966 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-01-29arm: DT autogeneration - autogenerate RealView Platform devicesGlenn Bergmans
Implements the Device Tree generating code for devices required by the RealView VExpress_GEM5_V1 platform Change-Id: I14244b2f3c028cbddba3c23ce7433fe3b301a0e8 Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5965 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-01-29arm: DT autogeneration - Generate cpus nodeGlenn Bergmans
Equips cpu models with a method to generate the cpu node. Note: even though official documentation requires that CPU ids start counting from 0 in every cluster, GEM5 requires a globally unique cpu_id. Change-Id: Ida3e17af3124a68ef7dbf2449cd034dfc3ec39df Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5963 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-01-29arm: make Arm GenericTimer a ClockedObjectCurtis Dunham
Within a device tree, the GenericTimer device needs to point (via phandle) to a clock domain which is itself also an object in the device tree. Within gem5, clock domains are managed by making all clocked SimObjects inherit from ClockedObject rather than SimObject. Without this change, the GenericTimer is unable to generate the appropriate clock domain phandle, and will crash during DTB autogeneration. Change-Id: I6d3fb6362847c6a01720b2f14b3d595d1e59f01f Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/4960 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2018-01-20base: Rework bitunions so they can be more flexible.Gabe Black
They are now oriented around a class which makes it easy to provide custom setter/getter functions which let you set or read bits in an arbitrary way. Future additions may add the ability to add custom bitfield methods, and index-able bitfields. Change-Id: Ibd6d4d9e49107490f6dad30a4379a8c93bda9333 Reviewed-on: https://gem5-review.googlesource.com/7201 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Gabe Black <gabeblack@google.com>
2018-01-10style: change C/C++ source permissions to noexecBKP
Several files in the repository were tracked with execute permissions even though the files are just normal C/C++ files (and the one .isa). Change-Id: I976b096acab4a1fc74c5699ef1f9b222c1e635c2 Reviewed-on: https://gem5-review.googlesource.com/7241 Reviewed-by: Gabe Black <gabeblack@google.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-12-14misc: Updates for gcc7.2 for x86Jason Lowe-Power
GCC 7.2 is much stricter than previous GCC versions. The following changes are needed: * There is now a warning if there is an implicit fallthrough between two case statments. C++17 adds the [[fallthrough]]; declaration. However, to support non C++17 standards (i.e., C++11), we use M5_FALLTHROUGH. M5_FALLTHROUGH checks for [[fallthrough]] compliant C++17 compiler and if that doesn't exist, it defaults to nothing (no older compilers generate warnings). * The above resulted in a couple of bugs that were found. This is noted in the review request on gerrit. * throw() for dynamic exception specification is deprecated * There were a couple of new uninitialized variable warnings * Can no longer perform bitwise operations on a bool. * Must now include <functional> for std::function * Compiler bug for void* lambda. Changed to auto as work around. See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=82878 Change-Id: I5d4c782a4e133fa4cdb119e35d9aff68c6e2958e Signed-off-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-on: https://gem5-review.googlesource.com/5802 Reviewed-by: Gabe Black <gabeblack@google.com>
2017-12-04misc: Rename misc.(hh|cc) to logging.(hh|cc)Gabe Black
These files aren't a collection of miscellaneous stuff, they're the definition of the Logger interface, and a few utility macros for calling into that interface (panic, warn, etc.). Change-Id: I84267ac3f45896a83c0ef027f8f19c5e9a5667d1 Reviewed-on: https://gem5-review.googlesource.com/6226 Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Gabe Black <gabeblack@google.com>
2017-11-20dev: Fix the SPARC and X86 platform devices.Gabe Black
A recent serial device refactoring changed the name of the parameter that the terminal device gets attached to on the UART. The x86 and SPARC platform devices didn't get updated though, and were still using the old name. This change updates those objects. Reported-by: Kanad Basu <kanad.kut@gmail.com> Change-Id: I0824a9df8639062d8561420ea9ffea26b8b7e2e9 Reviewed-on: https://gem5-review.googlesource.com/5781 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-11-17sim: Implement load_addr_mask auto-calculationGeoffrey Blake
Recent Linux kernels for AArch64 have changed their start addresses but we still want to relocate the kernel to 0x80080000 which required hacking the load_addr_mask in Realview.py to be 0x7ffffff from 0xfffffff to mask off the proper number of MSBs to load the kernel in the desired location. To avoid having to make this change in the future again, we auto-calculate the load_addr_mask if it is specified as 0x0 in the System sim-object to find the most restrictive address mask instead of having the configuration specify it. If the configuration does specify the address mask, we use it instead of auto-calculating. Change-Id: I18aabb5d09945c6e3e3819c9c8036ea24b6c35cf Signed-off-by: Geoffrey Blake <Geoffrey.Blake@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2323 Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-11-08dev: Move generic serial devices to src/dev/serialAndreas Sandberg
Change-Id: I104227fc460f8b561e7375b329a541c1fce881b2 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/4291 Reviewed-by: Gabe Black <gabeblack@google.com>
2017-11-08dev: Add a dummy serial deviceAndreas Sandberg
Add a dummy serial device that discards any output and doesn't provide any input. This device can be used to terminate UARTs that don't have a default device (e.g., a terminal) attached. Change-Id: I4a6b0b5037ce360f59bfb5c566e1698d113a1d26 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/4290 Reviewed-by: Gabe Black <gabeblack@google.com>
2017-11-08dev: Refactor UART->Terminal interfaceAndreas Sandberg
The UART models currently assume that they are always wired to a terminal. While true at the moment, this isn't necessarily a valid assumption. This change introduces the SerialDevice class that defines the interface for serial devices. Currently, Terminal is the only class that implements this interface. Change-Id: I74fefafbbaf5ac1ec0d4ec0b5a0f4b246fdad305 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Curtis Dunham <curtis.dunham@arm.com> Reviewed-on: https://gem5-review.googlesource.com/4289 Reviewed-by: Gabe Black <gabeblack@google.com>
2017-10-31dev: Using Configurable image writer in HDLcdGiacomo Travaglini
The fixed image writer (which was dumping .bmp images only) has been replaced by the configurable one in HDLcd device. Default format is Auto, which gives gem5 the freedom to choose the format it prefers. Change-Id: I0643266556bb10b43cdebd628f6daa2cd5e105dd Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5183 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-10-31base: Introducing utility for writing raw data in png formatGiacomo Travaglini
Originally it was possible to use a Bitmap writer class for dumping a framebuffer snapshot in a .bmp file. This patch enables you to choose another format. In particular it implements the writing of PNG Images using libpng library. The latter has to be already installed in your machine, otherwise gem5 will default to the Bitmap format. This configurable writer has been introduced in the VNC frame dumping mechanism, which is storing changed frame buffers from the VNC server Change-Id: Id7e5763c82235f1ce90381c8486b85a7cce734ce Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/5181 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-09-26dev: Make the IDE controller handle NULL simobject pointers.Gabe Black
Only panic if there are disks which would actually be connected to it beyond its limit. Also skip past disks which are set to NULL. This is useful since it lets you set up disks on different ports of the controller instead of filling them contiguously. Change-Id: I92f1316d3ad6931e25bfffeb34fb2603c0b95ce7 Reviewed-on: https://gem5-review.googlesource.com/4848 Maintainer: Gabe Black <gabeblack@google.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-09-25dev, virtio: Improvements to diod process handlingAnouk Van Laer
* When dispatching multiple gem5 simulations at once, they race for the socket id, resulting in a panic when calling 'bind'. To avoid this problem, the socket id is now created before the diod process is created. In case of a race, a panic is called in the gem5 process, whereas before the panic was called in the diod process where it didn't have any effect. * In some cases killing the diod process in terminateDiod() using only SIGTERM failed, so a call using SIGKILL is added. Change-Id: Ie10741e10af52c8d255210cd4bfe0e5d761485d3 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Sascha Bischoff <sascha.bischoff@arm.com> Reviewed-on: https://gem5-review.googlesource.com/2821 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-08-12dev: Fix an IDE error check.Gabe Black
The error message says an IDE controller can support at most 4 disks, but the check would fail if there were more than 3 disks. Change-Id: Ic7d5d8c941fe2580da43019f53991377d4727bb9 Reviewed-on: https://gem5-review.googlesource.com/4460 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
2017-08-01kvm, arm: Switch to the device EQ when accessing ISA devicesAndreas Sandberg
ISA devices typically run in the device event queue. Previously, we assumed that devices would perform their own EQ migrations as needed. This isn't ideal since it means we have different conventions for IO devices and ISA devices. Switch to doing migrations in the KVM CPU instead to make the behavior consistent. Change-Id: I33b74480fb2126b0786dbdbfdcfa86083384250c Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-on: https://gem5-review.googlesource.com/4288 Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
2017-07-12arm: Refactor some Event subclasses to lambdasSean Wilson
Change-Id: Ic59add8afee1d49633634272d9687a4b1558537e Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3929 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-07-12dev: Refactor some Event subclasses to lambdasSean Wilson
Change-Id: I965d31ff8ad1658b03a902bf4244d7d0977b0466 Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3928 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2017-07-12net: Refactor some Event subclasses to lambdasSean Wilson
Change-Id: I0e23f1529b26c36d749bf5211ee8623744d0b10f Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3927 Maintainer: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2017-07-10dev-arm: Add ID registers to the GIC modelJose Marinho
Implement GICD_IIDR, GICC_IIDR, GICD_PIDR0, GICD_PIDR1, GICD_PIDR2, and GICD_PIDR3. Change-Id: I4f6b5a6303907226e7d8e2f677543b3868c02e7b Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3961
2017-07-10dev-arm: Don't unconditionally overwrite bootloader paramsJose Marinho
The bootloader arguments were previously defaulting to a predetermined value even if initialized elsewhere in the platform config script. This commit fixes this issue by not calling the default initialization routine if the bootloader is already defined. Change-Id: Id80af4762b52dc036da29430b2795bb30970a349 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3967
2017-07-10dev: Fix OnIdle test in DmaReadFifoRohit Kurup
OnIdle() is never called since DMA active check is completely opposite to what it should be. old active status should be 'true' and new active status should be false for OnIdle to be called Change-Id: I94eca50edbe96113190837c7f6e50a0d061158a6 Reported-by: Rohit Kurup <rohit.kurup@arm.com> Signed-off-by: Rohit Kurup <rohit.kurup@arm.com> Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3966 Reviewed-by: Michael LeBeane <Michael.Lebeane@amd.com>
2017-07-10dev: Fix address type promotion issues in VirtIO devicesSascha Bischoff
With the change we explicitly update the types for the VirtIO bit masks to be Addr (uint64_t). By changing this, we ensure type promotion where it is needed. Therefore, this fixes issues where, in certain situations, address calculations were performed in 32-bits, resulting in overflows. Change-Id: I5c5c3f9a3f94e806812282da01268e18ae0d2d39 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3968
2017-07-07kvm, arm: don't create interrupt events while saving GIC stateCurtis Dunham
If an interrupt was pending according to Kvm state during a drain, the Pl390 model would create an interrupt event that could not be serviced, preventing the system from draining. The proper behavior is for the Pl390 not actively being used for simulation to just skip the GIC state machine that delivers interrupts. Change-Id: Icb37e7e992f1fb441a9b3a26daa1bb5a6fe19228 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-on: https://gem5-review.googlesource.com/3661 Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-07-05dev,arm: add Kvm mode of operation for CP15 timerCurtis Dunham
The timer device exposed via the ARM ISA, also known as the "CP15 timer" due to its legacy coprocessor encodings, is implemented by the GenericTimerISA class. During Kvm execution, however, this functionality is directly emulated by the hardware. This commit subclasses the GenericTimer, which is (solely) used by GenericTimerISA, to facilitate Kvm in much the same way as the prior GIC changes: the gem5 model is used as the backing store for state, so checkpointing and CPU switching work correctly, but isn't used during Kvm execution. The added indirection prevents the timer device from creating events when we're just updating its state, but not actually using it for simulation. Change-Id: I427540d11ccf049c334afe318f575146aa888672 Reviewed-on: https://gem5-review.googlesource.com/3542 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-07-05dev,arm: remove and recreate timer events around drainsCurtis Dunham
Having timer events stored in checkpoints complicates Kvm execution. We change the timer behavior so that it always deschedules any pending events on a drain() and recreates them on a drainResume(), thus they will never appear in checkpoints henceforth. This pattern of behavior makes it simpler to handle Kvm execution, where the hardware performs the timer function directly. Change-Id: Ia218868c69350d96e923c640634d492b5c19cd3f Reviewed-on: https://gem5-review.googlesource.com/3541 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-06-29arm: Fix memleak in Pl390 by adding destructorSean Wilson
Change-Id: I3395e64311f6aa7bbfb6eee9bfec82e832bcbd4d Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3901 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-06-29arm: Fix memleak in VGic by adding destructorSean Wilson
Change-Id: I864b5d9ed655cc52e440e2eb54987e8ff9a73296 Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3900 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-06-20dev: Replace EventWrapper use with EventFunctionWrapperSean Wilson
Change-Id: I6b03cc6f67e76dffb79940431711ae6171901c6a Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3748 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-06-20arm: Replace EventWrapper use with EventFunctionWrapperSean Wilson
Change-Id: I08de5f72513645d1fe92bde99fa205dde897e951 Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3747 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
2017-06-19arm: ignore writes to the reset_ctl registerGedare Bloom
Change-Id: I953521572e6ace475b656369c9f07ddfa50d731a Signed-off-by: Gedare Bloom <gedare@rtems.org> Reviewed-on: https://gem5-review.googlesource.com/3263 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>