Age | Commit message (Expand) | Author |
---|---|---|
2012-10-25 | dev: Make default clock more reasonable for system and devices | Andreas Hansson |
2012-09-21 | Mem: Tidy up bus member variables types | Andreas Hansson |
2012-09-07 | Param: Transition to Cycles for relevant parameters | Andreas Hansson |
2012-08-21 | Clock: Move the clock and related functions to ClockedObject | Andreas Hansson |
2012-07-09 | Bus: Make the default bus width 8 bytes instead of 64 | Andreas Hansson |
2012-05-31 | Bus: Split the bus into a non-coherent and coherent bus | Andreas Hansson |
2012-02-13 | MEM: Introduce the master/slave port roles in the Python classes | Andreas Hansson |
2010-08-17 | bus: clean up default responder code. | Steve Reinhardt |
2009-09-22 | python: Move more code into m5.util allow SCons to use that code. | Nathan Binkert |
2008-07-16 | mem: use single BadAddr responder per system. | Steve Reinhardt |
2008-02-26 | Bus: Fix the bus timing to be more realistic. | Gabe Black |
2007-05-27 | Move SimObject python files alongside the C++ and fix | Nathan Binkert |