summaryrefslogtreecommitdiff
path: root/src/mem/SConscript
AgeCommit message (Expand)Author
2014-05-09mem: Add DRAM power states to the controllerAndreas Hansson
2014-03-23mem: Rename SimpleDRAM to a more suitable DRAMCtrlAndreas Hansson
2014-03-23ruby: Move Ruby debug flags to ruby dir and remove stale optionsAndreas Hansson
2014-03-23mem: Include the DRAMSim2 wrapper in NULL buildAndreas Hansson
2014-02-18mem: Add a wrapped DRAMSim2 memory controllerAndreas Hansson
2013-11-01mem: Use the same timing calculation for DRAM read and writeAni Udipi
2013-09-04arch: Resurrect the NOISA build target and rename it NULLAndreas Hansson
2013-01-07mem: Add tracing support in the communication monitorAndreas Hansson
2012-12-11ruby: add a prefetcherNilay Vaish
2012-09-25mem: Add a gasket that allows memory ranges to be re-mapped.Ali Saidi
2012-09-21DRAM: Introduce SimpleDRAM to capture a high-level controllerAndreas Hansson
2012-08-22Bridge: Remove NACKs in the bridge and unify with packet queueAndreas Hansson
2012-07-10ruby: banked cache array resource modelBrad Beckmann
2012-07-10ruby: tag and data cache access supportJoel Hestness
2012-05-31Bus: Split the bus into a non-coherent and coherent busAndreas Hansson
2012-05-09MEM: Add the communication monitorAndreas Hansson
2012-04-06MEM: Enable multiple distributed generalized memoriesAndreas Hansson
2012-03-30MEM: Remove legacy DRAM in preparation for memory updatesAndreas Hansson
2012-03-22MEM: Split SimpleTimingPort into PacketQueue and portsAndreas Hansson
2012-02-24MEM: Move all read/write blob functions from Port to PortProxyAndreas Hansson
2012-01-28Merge with the main repo.Gabe Black
2012-01-16Merge yet again with the main repository.Gabe Black
2012-01-17MEM: Add port proxies instead of non-structural portsAndreas Hansson
2012-01-11Ruby Debug Flags: Remove one, add anotherNilay Vaish
2012-01-11Ruby: Add infrastructure for recording cache contentsNilay Vaish
2012-01-07Merge with main repository.Gabe Black
2011-11-14Ruby: Process packet instead of RubyRequest in SequencerNilay Vaish
2011-10-16SE/FS: Turn on the page table class in FS.Gabe Black
2011-10-16SE/FS: Build in the tport in FS mode.Gabe Black
2011-10-16SE/FS: Build/expose vport in SE mode.Gabe Black
2011-06-02scons: rename TraceFlags to DebugFlagsNathan Binkert
2011-03-19RubyPort: minor fixes to trace flag and dprintfsBrad Beckmann
2011-01-10ruby: get rid of ruby's Debug.hhNathan Binkert
2010-12-01ruby: Converted old ruby debug calls to M5 debug callsNilay Vaish
2010-11-19SCons: Support building without an ISAAli Saidi
2010-01-29ruby: Convert most Ruby objects to M5 SimObjects.Steve Reinhardt
2009-11-18ruby: Support for merging ALPHA_FS and rubyBrad Beckmann
2009-05-11ruby: add RUBY sticky option that must be set to add ruby to the buildNathan Binkert
2009-05-11ruby: Working M5 interface and updated Ruby interface.Daniel Sanchez
2009-01-13SCons: centralize the Dir() workaround for newer versions of scons.Nathan Binkert
2008-10-12Create a message port for sending messages as apposed to reading/writing a me...Gabe Black
2008-04-10SCons: add comments to SConscript documenting bug workaroundAli Saidi
2008-04-08SCons: Manually specifying header only directories with Dir() works around th...Ali Saidi
2007-10-31Traceflags: Add SCons function to created a traceflag instead of having one f...Ali Saidi
2007-05-27Move SimObject python files alongside the C++ and fixNathan Binkert
2007-03-10Rework the way SCons recurses into subdirectories, making itNathan Binkert