gem5 - gem5

Age	Commit message (Collapse)	Author
2012-10-15	Port: Add protocol-agnostic ports in the port hierarchy	Andreas Hansson
	This patch adds an additional level of ports in the inheritance hierarchy, separating out the protocol-specific and protocl-agnostic parts. All the functionality related to the binding of ports is now confined to use BaseMaster/BaseSlavePorts, and all the protocol-specific parts stay in the Master/SlavePort. In the future it will be possible to add other protocol-specific implementations. The functions used in the binding of ports, i.e. getMaster/SlavePort now use the base classes, and the index parameter is updated to use the PortID typedef with the symbolic InvalidPortID as the default.
2012-10-15	Mem: Use range operations in bus in preparation for striping	Andreas Hansson
	This patch transitions the bus to use the AddrRange operations instead of directly accessing the start and end. The change facilitates the move to a more elaborate AddrRange class that also supports address striping in the bus by specifying interleaving bits in the ranges. Two new functions are added to the AddrRange to determine if two ranges intersect, and if one is a subset of another. The bus propagation of address ranges is also tweaked such that an update is only propagated if the bus received information from all the downstream slave modules. This avoids the iteration and need for the cycle-breaking scheme that was previously used.
2012-09-25	mem: Add a gasket that allows memory ranges to be re-mapped.	Ali Saidi
	For example if DRAM is at two locations and mirrored this patch allows the mirroring to occur.