| Age | Commit message (Expand) | Author |
|---|
| 2014-09-03 | mem: Avoid unecessary retries when bus peer is not ready | Andreas Hansson |
| 2013-07-18 | mem: Set the cache line size on a system level | Andreas Hansson |
| 2013-05-30 | mem: Make returning snoop responses occupy response layer | Andreas Hansson |
| 2013-05-30 | mem: Make the buses multi layered | Andreas Hansson |
| 2013-05-30 | mem: Separate the two snoop response cases in the bus | Andreas Hansson |
| 2013-05-30 | mem: Add basic stats to the buses | Uri Wiener |
| 2013-05-30 | mem: Check for waiting state in bus draining | Andreas Hansson |
| 2013-04-22 | sim: separate nextCycle() and clockEdge() in clockedObjects | Dam Sunwoo |
| 2013-03-26 | mem: Separate waiting for the bus and waiting for a peer | Andreas Hansson |
| 2013-03-26 | mem: Introduce a variable for the retrying port | Andreas Hansson |
| 2013-03-01 | mem: Merge ranges in bus before passing them on | Andreas Hansson |
| 2013-02-19 | mem: Enforce strict use of busFirst- and busLastWordTime | Andreas Hansson |
| 2013-02-19 | mem: Make packet bus-related time accounting relative | Andreas Hansson |
| 2013-02-19 | sim: Make clock private and access using clockPeriod() | Andreas Hansson |
| 2013-01-07 | mem: Tidy up bus addr range debug messages | Andreas Hansson |
| 2013-01-07 | base: Encapsulate the underlying fields in AddrRange | Andreas Hansson |
| 2012-11-02 | sim: Move the draining interface into a separate base class | Andreas Sandberg |
| 2012-10-15 | Mem: Fix incorrect logic in bus blocksize check | Andreas Hansson |
| 2012-10-15 | Port: Add protocol-agnostic ports in the port hierarchy | Andreas Hansson |
| 2012-10-15 | Mem: Use range operations in bus in preparation for striping | Andreas Hansson |
| 2012-10-11 | Mem: Determine bus block size during initialisation | Andreas Hansson |
| 2012-09-21 | Mem: Tidy up bus member variables types | Andreas Hansson |
| 2012-09-20 | bus: removed outdated warn regarding 64 B block sizes | Anthony Gutierrez |
| 2012-09-19 | AddrRange: Transition from Range<T> to AddrRange | Andreas Hansson |
| 2012-08-21 | Clock: Move the clock and related functions to ClockedObject | Andreas Hansson |
| 2012-08-15 | O3,ARM: fix some problems with drain/switchout functionality and add Drain DP... | Anthony Gutierrez |
| 2012-07-09 | Bus: Split the bus into separate request/response layers | Andreas Hansson |
| 2012-07-09 | Bus: Add a notion of layers to the buses | Andreas Hansson |
| 2012-07-09 | Bus: Replace tickNextIdle and inRetry with a state variable | Andreas Hansson |
| 2012-07-09 | Port: Make getAddrRanges const | Andreas Hansson |
| 2012-07-09 | Port: Add getAddrRanges to master port (asking slave port) | Andreas Hansson |
| 2012-07-09 | Port: Move retry from port base class to Master/SlavePort | Andreas Hansson |
| 2012-05-31 | Bus: Split the bus into a non-coherent and coherent bus | Andreas Hansson |
| 2012-05-30 | Bus: Remove redundant packet parameter from isOccupied | Andreas Hansson |
| 2012-05-30 | Bus: Turn the PortId into a transport function parameter | Andreas Hansson |
| 2012-05-30 | Packet: Unify the use of PortID in packet and port | Andreas Hansson |
| 2012-05-08 | MEM: Do not forward uncacheable to bus snoopers | Andreas Hansson |
| 2012-05-01 | MEM: Separate requests and responses for timing accesses | Andreas Hansson |
| 2012-04-25 | MEM: Use base class Master/SlavePort pointers in the bus | Andreas Hansson |
| 2012-04-25 | MEM: Add the PortId type and a corresponding id field to Port | Andreas Hansson |
| 2012-04-14 | MEM: Remove the Broadcast destination from the packet | Andreas Hansson |
| 2012-04-14 | MEM: Separate snoops and normal memory requests/responses | Andreas Hansson |
| 2012-03-30 | MEM: Introduce the master/slave port sub-classes in C++ | William Wang |
| 2012-03-22 | MEM: Unify bus access methods and prepare for master/slave split | Andreas Hansson |
| 2012-02-24 | MEM: Move port creation to the memory object(s) construction | Andreas Hansson |
| 2012-02-24 | MEM: Fatal when no port can be found for an address | Andreas Hansson |
| 2012-02-09 | MEM: Remove onRetryList from BusPort and rely on retryList | Andreas Hansson |
| 2012-01-31 | CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5 | Geoffrey Blake |
| 2012-01-17 | MEM: Make the bus default port yet another port | Andreas Hansson |
| 2012-01-17 | MEM: Remove the functional ports from the memory system | William Wang |
