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path: root/src/mem/bus.cc
AgeCommit message (Expand)Author
2007-08-10Bus: Only call end() on an stl object once in a loopAli Saidi
2007-08-04port: Implement cache for port interfaces and rangesVincentius Robby
2007-07-29bus: take out response prioritization (timing was messed up).Steve Reinhardt
2007-07-26Merge python and x86 changes with cache branchNathan Binkert
2007-07-26bus: Fix default port handling.Steve Reinhardt
2007-07-24Integrate snoop loop functions into their respective call sites.Steve Reinhardt
2007-07-23Major changes to how SimObjects are created and initialized. Almost allNathan Binkert
2007-07-17Make sure responses never get blocked.Steve Reinhardt
2007-07-15Fix up a bunch of multilevel coherence issues.Steve Reinhardt
2007-07-15Make Bus::findPort() a little more useful.Steve Reinhardt
2007-07-14Merge of DPRINTF fixes from head.Steve Reinhardt
2007-07-14Fix & tweak DPRINTFs for tracediff w/new cache code.Steve Reinhardt
2007-07-02bus.cc:Steve Reinhardt
2007-06-30Get rid of Packet result field. Error responses areSteve Reinhardt
2007-06-21Merge vm1.(none):/home/stever/bk/newmem-headSteve Reinhardt
2007-06-20Minor error.Vincentius Robby
2007-06-20Removed "adding instead of dividing" trick.Vincentius Robby
2007-06-17Merge vm1.(none):/home/stever/bk/newmem-headSteve Reinhardt
2007-06-17More major reorg of cache. Seems to work for atomic mode now,Steve Reinhardt
2007-06-09Add a startup function that will fast forward to the right clock edgeNathan Binkert
2007-05-22Merge vm1.(none):/home/stever/bk/newmem-headSteve Reinhardt
2007-05-21Change getDeviceAddressRanges to use bool for snoop arg.Steve Reinhardt
2007-05-18First set of changes for reorganized cache coherence support.Steve Reinhardt
2007-05-09undo my previous bus change, it can make the bus deadlock.. so it still const...Ali Saidi
2007-05-07fix partial writes with a functional memory hackAli Saidi
2007-04-04The MemoryObject tha owns a port should delete it if it so chooses when delet...Ali Saidi
2007-03-23Merge ktlim@zizzer:/bk/newmemKevin Lim
2007-03-233 memory system fixes:Kevin Lim
2007-03-08stop m5 from leaking like a sieveAli Saidi
2007-02-06More DPRINTF cleanup.Steve Reinhardt
2007-02-06Minor DPRINTF fixes.Steve Reinhardt
2006-12-15Use my range_map to speed up findPort() in the bus. The snoop code could stil...Ali Saidi
2006-11-22Do a functional access to levels above on a read as a temporary solution for ...Ron Dreslinski
2006-11-14Fix bugs around uni-coherence invalidates being propogated properly.Ron Dreslinski
2006-11-14Update atomic and functional paths for snoops as wellRon Dreslinski
2006-11-14Update bus bridges now that snoop ranges are passed properlyRon Dreslinski
2006-11-13Fix some errors related to snooping and functional access in the busRon Dreslinski
2006-11-13Fix problems with snoop ranges not working properly on functional accessesRon Dreslinski
2006-11-09Be sure to populate the packet's finishTime field in the atomic timing case.Kevin Lim
2006-11-09Draining fixes.Kevin Lim
2006-11-07Fix up bus draining and add draining to the caches.Kevin Lim
2006-11-02Merge ktlim@zizzer:/bk/newmemKevin Lim
2006-11-02Have bus use the BadAddress device to handle bad addresses. The O3 CPU shoul...Kevin Lim
2006-11-01Added code to handle draining.Gabe Black
2006-10-20Use PacketPtr everywhereNathan Binkert
2006-10-19Fix compile of m5.fastNathan Binkert
2006-10-12small bus updates for functional accessesAli Saidi
2006-10-11Make default ID unique (not broadcast)Ron Dreslinski
2006-10-11Fix bus in FS mode.Ron Dreslinski
2006-10-11More cache fixes. Atomic coherence now works as well.Ron Dreslinski