gem5 - gem5

Age	Commit message (Expand)	Author
2006-12-18	No need to template prefetcher on cache TagStore type.	Steve Reinhardt
2006-12-13	Split CachePort class into CpuSidePort and MemSidePort	Steve Reinhardt
2006-11-13	Since cpus now send out snoop ranges, remove it from the cache.	Ron Dreslinski
2006-11-12	Don't insert reponses into the list more than once	Ron Dreslinski
2006-11-10	More fixes for functional accesses. It now makes the writeback memory leak t...	Ron Dreslinski
2006-11-07	Fix up bus draining and add draining to the caches.	Kevin Lim
2006-10-20	Use PacketPtr everywhere	Nathan Binkert
2006-10-19	Fixes to get single level uni-coherence to work.	Ron Dreslinski
2006-10-18	Get rid of obsolete in-cache copy support.	Steve Reinhardt
2006-10-17	Fixes to cache eliminating the assumption that the Packet is still valid afte...	Ron Dreslinski
2006-10-13	Fix for DMA's in FS caches.	Ron Dreslinski
2006-10-12	Remove bus and top level parameters from cache	Ron Dreslinski
2006-10-10	Some more code cleanup	Ron Dreslinski
2006-10-10	Fix some more mem leaks, still some left	Ron Dreslinski
2006-10-10	Fix several bugs pertaining to upgrades/mem leaks.	Ron Dreslinski
2006-10-09	Set size properly on uncache accesses	Ron Dreslinski
2006-10-09	Have cpus send snoop ranges	Ron Dreslinski
2006-10-08	Only respond if the pkt needs a response.	Ron Dreslinski
2006-10-08	Move away from using the statusChange function on snoops. Clean up snooping ...	Ron Dreslinski
2006-10-07	Add mechanism for caches to handle failure of the fast path on responses.	Ron Dreslinski
2006-10-06	Remove threadnum from cache everywhere for now	Ron Dreslinski
2006-10-05	Fixes for functional accesses to use the snoop path.	Ron Dreslinski
2006-10-05	First pass at snooping stuff that compiles and doesn't break.	Ron Dreslinski
2006-08-16	Fixes for blocking in the caches that needed to be pulled	Ron Dreslinski
2006-08-15	Merge zizzer:/z/m5/Bitkeeper/newmem	Ron Dreslinski
2006-08-15	Some changes to support blocking in the caches	Ron Dreslinski
2006-08-14	Fix up doxygen.	Steve Reinhardt
2006-07-07	Fix address range calculation. Still need bus to handle snoop ranges.	Ron Dreslinski
2006-07-06	Timing cache works for hello world test.	Ron Dreslinski
2006-07-06	Now timing reads work in single level of cache with simple cpu	Ron Dreslinski
2006-06-30	Fix the packet data allocation methods. Small fixes from changesets after my...	Ron Dreslinski
2006-06-28	Backing in more changsets, getting closer to compile	Ron Dreslinski
2006-06-28	Was having difficulty with merging the cache, reverted to an early version an...	Ron Dreslinski