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path: root/src/mem/cache/blk.hh
AgeCommit message (Expand)Author
2014-12-02mem: Remove WriteInvalidate supportCurtis Dunham
2014-06-27mem: write streaming support via WriteInvalidate promotionCurtis Dunham
2014-05-13cpu, mem: Make software prefetches non-blockingCurtis Dunham
2014-04-01mem: Don't print out the data of a cache blockMitch Hayenga
2014-01-24mem: Add support for a security bit in the memory systemGiacomo Gabrielli
2014-01-24mem: per-thread cache occupancy and per-block agesDam Sunwoo
2013-04-22mem: Adding verbose debug output in the memory systemUri Wiener
2013-01-08mem: Make LL/SC locks fine grainedMitch Hayenga
2012-11-02mem: Add support for writing back and flushing cachesAndreas Sandberg
2012-09-11Cache: Split invalidateBlk up to seperate block vs. tagsLena Olson
2012-02-12mem: fix cache stats to use request ids correctlyDam Sunwoo
2011-04-15includes: sort all includesNathan Binkert
2011-02-23Includes: Don't include isa_traits.hh and use the TheISA namespace unless rea...Ali Saidi
2011-01-07Replace curTick global variable with accessor functions.Steve Reinhardt
2010-02-23cache: Make caches sharing aware and add occupancy stats.Lisa Hsu
2010-02-23cache: pull CacheSet out of LRU so that other tags can use associative sets.Lisa Hsu
2009-06-04types: clean up types, especially signed vs unsignedNathan Binkert
2009-04-19Mem: Change isLlsc to isLLSC.Gabe Black
2009-04-19Memory: Rename LOCKED for load locked store conditional to LLSC.Gabe Black
2009-02-16Fixes to get prefetching working again.Steve Reinhardt
2008-11-02Add in Context IDs to the simulator. From now on, cpuId is almost never used,Lisa Hsu
2008-09-10style: Remove non-leading tabs everywhere they shouldn't be. Developers shoul...Ali Saidi
2008-02-26Revamp cache timing access mshr check to make stats sane again.Steve Reinhardt
2008-02-10Rename cache files for brevity and consistency with rest of tree.Steve Reinhardt