index
:
gem5
hitsb
invisispec-1.0
invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
is-rebase12
simple-object-demo
gem5
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
mem
/
cache
/
blk.hh
Age
Commit message (
Expand
)
Author
2012-02-12
mem: fix cache stats to use request ids correctly
Dam Sunwoo
2011-04-15
includes: sort all includes
Nathan Binkert
2011-02-23
Includes: Don't include isa_traits.hh and use the TheISA namespace unless rea...
Ali Saidi
2011-01-07
Replace curTick global variable with accessor functions.
Steve Reinhardt
2010-02-23
cache: Make caches sharing aware and add occupancy stats.
Lisa Hsu
2010-02-23
cache: pull CacheSet out of LRU so that other tags can use associative sets.
Lisa Hsu
2009-06-04
types: clean up types, especially signed vs unsigned
Nathan Binkert
2009-04-19
Mem: Change isLlsc to isLLSC.
Gabe Black
2009-04-19
Memory: Rename LOCKED for load locked store conditional to LLSC.
Gabe Black
2009-02-16
Fixes to get prefetching working again.
Steve Reinhardt
2008-11-02
Add in Context IDs to the simulator. From now on, cpuId is almost never used,
Lisa Hsu
2008-09-10
style: Remove non-leading tabs everywhere they shouldn't be. Developers shoul...
Ali Saidi
2008-02-26
Revamp cache timing access mshr check to make stats sane again.
Steve Reinhardt
2008-02-10
Rename cache files for brevity and consistency with rest of tree.
Steve Reinhardt