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path: root/src/mem/cache/cache.hh
AgeCommit message (Expand)Author
2010-09-09cache: coherence protocol enhancements & bug fixesSteve Reinhardt
2008-07-16mem: use single BadAddr responder per system.Steve Reinhardt
2009-02-16Fixes to get prefetching working again.Steve Reinhardt
2008-10-23s/cpu_id/cpuId in o3 (to be consistent and match style), also fix some typos inLisa Hsu
2008-10-23probe function no longer used anywhere.Lisa Hsu
2008-10-14This function declaration isn't used anywhere.Lisa Hsu
2008-06-28Backed out changeset 94a7bb476fca: caused memory leak.Steve Reinhardt
2008-06-21Generate more useful error messages for unconnected ports.Steve Reinhardt
2008-03-25Fix handling of writeback-induced writebacks in atomic mode.Steve Reinhardt
2008-02-26Cache: better comments particularly regarding writeback situation.Steve Reinhardt
2008-02-16Make L2+ caches allocate new block for writeback missesSteve Reinhardt
2008-02-10Fix #include lines for renamed cache files.Steve Reinhardt
2008-01-02Add ReadRespWithInvalidate to handle multi-level coherence situationSteve Reinhardt
2008-01-02Add functional PrintReq command for memory-system debugging.Steve Reinhardt
2007-08-30params: Deprecate old-style constructors; update most SimObject constructors.Miles Kaufmann
2007-08-10DMA: Add IOCache and fix bus bridge to optionally only send requests oneAli Saidi
2007-07-22Replace lowerMSHRPending flag with more robust schemeSteve Reinhardt
2007-07-22Replace DeferredSnoop flag with LowerMSHRPending flag.Steve Reinhardt
2007-06-27Get rid of coherence protocol object.Steve Reinhardt
2007-06-26Revamp replacement-of-upgrade handling.Steve Reinhardt
2007-06-26Handle deferred snoops better.Steve Reinhardt
2007-06-24Better handling of deferred targets.Steve Reinhardt
2007-06-22Fixes to hitLatency, blocking, buffer allocation.Steve Reinhardt
2007-06-21Getting closer...Steve Reinhardt
2007-06-17More major reorg of cache. Seems to work for atomic mode now,Steve Reinhardt
2007-05-22Fix getDeviceAddressRanges() to get snooping right.Steve Reinhardt
2007-05-18First set of changes for reorganized cache coherence support.Steve Reinhardt
2007-03-27First Pass At Cmp/Swap in cachesRon Dreslinski
2007-03-08stop m5 from leaking like a sieveAli Saidi
2006-12-18Streamline Cache/Tags interface: get rid of redundant functions,Steve Reinhardt
2006-12-18No need to template prefetcher on cache TagStore type.Steve Reinhardt
2006-12-18Get rid of generic CacheTags object (fold back into Cache).Steve Reinhardt
2006-12-13Split CachePort class into CpuSidePort and MemSidePortSteve Reinhardt
2006-12-04Turn cache MissQueue/BlockingBuffer into virtual objectSteve Reinhardt
2006-10-20Use PacketPtr everywhereNathan Binkert
2006-10-18Get rid of obsolete in-cache copy support.Steve Reinhardt
2006-10-13Fix for DMA's in FS caches.Ron Dreslinski
2006-10-10Fix several bugs pertaining to upgrades/mem leaks.Ron Dreslinski
2006-10-09Set size properly on uncache accessesRon Dreslinski
2006-10-05Fixes for functional accesses to use the snoop path.Ron Dreslinski
2006-08-15Pulled out changes to fix EIO programs with caches. Also fixes any translati...Ron Dreslinski
2006-08-14Fix up doxygen.Steve Reinhardt
2006-07-06Timing cache works for hello world test.Ron Dreslinski
2006-07-06Now timing reads work in single level of cache with simple cpuRon Dreslinski
2006-06-30First pass, now compiles with current head of tree.Ron Dreslinski
2006-06-30Fix the packet data allocation methods. Small fixes from changesets after my...Ron Dreslinski
2006-06-29Still missing prefetch and tags directories as well as cache builder.Ron Dreslinski
2006-06-28More Changes, working towards cache.cc compiling. Headers cleaned up.Ron Dreslinski
2006-06-28Backing in more changsets, getting closer to compileRon Dreslinski
2006-06-28Was having difficulty with merging the cache, reverted to an early version an...Ron Dreslinski
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