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path: root/src/mem/cache/cache_impl.hh
AgeCommit message (Expand)Author
2007-07-14Fix & tweak DPRINTFs for tracediff w/new cache code.Steve Reinhardt
2007-05-14Merge vm1.(none):/home/stever/bk/newmem-headSteve Reinhardt
2007-05-14add uglyiness to fix dmasAli Saidi
2007-05-13Split BaseCache::CacheEvent into RequestEvent and ResponseEvent.Steve Reinhardt
2007-05-09add a backoff algorithm when nacks are received by devicesAli Saidi
2007-04-04The MemoryObject tha owns a port should delete it if it so chooses when delet...Ali Saidi
2007-03-28Call compare and Swap on the target, not the response.Ron Dreslinski
2007-03-27Merge zizzer:/bk/newmemRon Dreslinski
2007-03-27First Pass At Cmp/Swap in cachesRon Dreslinski
2007-03-23Merge ktlim@zizzer:/bk/newmemKevin Lim
2007-03-233 memory system fixes:Kevin Lim
2007-03-12Clean up more memory leaksRon Dreslinski
2007-03-12Fix some of the memory leaks related to writebacksRon Dreslinski
2007-03-08stop m5 from leaking like a sieveAli Saidi
2007-02-12rename store conditional stuff as extra data so it can be used for conditiona...Ali Saidi
2007-02-07Merge zizzer.eecs.umich.edu:/bk/newmemSteve Reinhardt
2007-02-07Make memory commands dense again to avoid cache stat table explosion.Steve Reinhardt
2007-02-06Fix for LL/SC that Ron sent me.Kevin Lim
2007-01-26make our code a little more standards compliantAli Saidi
2006-12-18Streamline Cache/Tags interface: get rid of redundant functions,Steve Reinhardt
2006-12-18No need to template prefetcher on cache TagStore type.Steve Reinhardt
2006-12-18Get rid of generic CacheTags object (fold back into Cache).Steve Reinhardt
2006-12-13Split CachePort class into CpuSidePort and MemSidePortSteve Reinhardt
2006-12-04Turn cache MissQueue/BlockingBuffer into virtual objectSteve Reinhardt
2006-11-22Do a functional access to levels above on a read as a temporary solution for ...Ron Dreslinski
2006-11-12Handle packets being deleted by lower level properly.Ron Dreslinski
2006-11-12Move code before a early return to make sure it is executed on all pathsRon Dreslinski
2006-11-12Yet another small bug in mem system related to flow controlRon Dreslinski
2006-11-10More fixes for functional accesses. It now makes the writeback memory leak t...Ron Dreslinski
2006-10-22Clean up cache DPRINTFsSteve Reinhardt
2006-10-22s/pktuest/request/ (all in comments)Steve Reinhardt
2006-10-21Small bug fixes for timing LL/SC. Better now butSteve Reinhardt
2006-10-21Just give up if a store conditional misses completelySteve Reinhardt
2006-10-20Merge zizzer:/bk/newmemRon Dreslinski
2006-10-20Use fixPacket function everywhere.Ron Dreslinski
2006-10-20Use PacketPtr everywhereNathan Binkert
2006-10-19Fix corner case on assertion.Ron Dreslinski
2006-10-19Fix memtester to use functional access, fix cache to work functionally now th...Ron Dreslinski
2006-10-19Small changes:Ron Dreslinski
2006-10-19Fixes to get single level uni-coherence to work.Ron Dreslinski
2006-10-19Merge zizzer:/bk/newmemRon Dreslinski
2006-10-19Always get the functional access from the highest level of cache first.Ron Dreslinski
2006-10-19First cut at LL/SC support in caches (atomic mode only).Steve Reinhardt
2006-10-18Break a lot of overly long lines.Steve Reinhardt
2006-10-18Get rid of obsolete in-cache copy support.Steve Reinhardt
2006-10-17Fixes to cache eliminating the assumption that the Packet is still valid afte...Ron Dreslinski
2006-10-17Properly chack the pkt pointer on upgrades to insure no segfaults when writeb...Ron Dreslinski
2006-10-17Fix it so that the cache does not assume to gave the packet it sent out via s...Ron Dreslinski
2006-10-13Fix for DMA's in FS caches.Ron Dreslinski
2006-10-12Remove bus and top level parameters from cacheRon Dreslinski
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