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cache_impl.hh
Age
Commit message (
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Author
2015-07-07
sim: Refactor the serialization base class
Andreas Sandberg
2015-07-03
mem: Delay responses in the crossbar before forwarding
Andreas Hansson
2015-07-03
mem: Remove redundant is_top_level cache parameter
Andreas Hansson
2015-07-03
mem: Split WriteInvalidateReq into write and invalidate
Andreas Hansson
2015-07-03
mem: Add ReadCleanReq and ReadSharedReq packets
Andreas Hansson
2015-07-03
mem: Allow read-only caches and check compliance
Andreas Hansson
2015-07-03
mem: Add clean evicts to improve snoop filter tracking
Ali Jafri
2015-06-09
mem: Fix snoop packet data allocation bug
Andreas Hansson
2015-03-17
mem: Create a request copy for deferred snoops
Stephan Diestelhorst
2015-05-05
mem: Snoop into caches on uncacheable accesses
Andreas Hansson
2015-05-05
mem: Pass shared downstream through caches
Andreas Hansson
2015-05-05
mem: Add forward snoop check for HardPFReqs
Ali Jafri
2015-05-05
mem: Add missing stats update for uncacheable MSHRs
Andreas Hansson
2015-05-05
mem: Remove templates in cache model
David Guillen
2015-03-27
mem: Allocate cache writebacks before new MSHRs
Andreas Hansson
2015-03-27
mem: Cleanup flow for uncacheable accesses
Andreas Hansson
2015-03-27
mem: Remove redundant allocateUncachedReadBuffer in cache
Andreas Hansson
2015-03-27
mem: Align all MSHR entries to block boundaries
Andreas Hansson
2015-03-27
mem: Rename PREFETCH_SNOOP_SQUASH flag to BLOCK_CACHED
Ali Jafri
2015-02-11
mem: remove redundant test in in Cache::recvTimingResp()
Steve Reinhardt
2015-02-11
mem: add local var in Cache::recvTimingResp()
Steve Reinhardt
2015-03-14
mem: clean up write buffer check in Cache::handleSnoop()
Steve Reinhardt
2015-03-02
mem: Unify all cache DPRINTF address formatting
Andreas Hansson
2015-03-02
mem: Fix cache MSHR conflict determination
Andreas Hansson
2015-03-02
mem: Add option to force in-order insertion in PacketQueue
Stephan Diestelhorst
2015-03-02
mem: Downstream components consumes new crossbar delays
Marco Balboni
2015-03-02
mem: Tidy up the cache debug messages
Andreas Hansson
2015-03-02
mem: Split port retry for all different packet classes
Andreas Hansson
2015-03-02
mem: Fix prefetchSquash + memInhibitAsserted bug
Ali Jafri
2015-02-11
mem: Clarification of packet crossbar timings
Marco Balboni
2015-02-11
mem: Clarify usage of latency in the cache
Marco Balboni
2015-02-03
mem: Clarify express snoop behaviour
Andreas Hansson
2015-02-03
mem: Clarify cache behaviour for pending dirty responses
Andreas Hansson
2015-01-22
mem: Remove Packet source from ForwardResponseRecord
Andreas Hansson
2015-01-20
mem: Fix bug in cache request retry mechanism
Andreas Hansson
2014-12-23
mem: Fix event scheduling issue for prefetches
Mitch Hayenga
2014-12-23
mem: Fix bug relating to writebacks and prefetches
Mitch Hayenga
2014-12-23
mem: Rework the structuring of the prefetchers
Mitch Hayenga
2014-12-23
mem: Add parameter to reserve MSHR entries for demand access
Mitch Hayenga
2014-12-02
mem: Support WriteInvalidate (again)
Curtis Dunham
2014-12-02
mem: Remove WriteInvalidate support
Curtis Dunham
2014-12-02
mem: Clean up packet data allocation
Andreas Hansson
2014-12-02
mem: Cleanup Packet::checkFunctional and hasData usage
Andreas Hansson
2014-12-02
mem: Make the requests carried by packets const
Andreas Hansson
2014-12-02
mem: Add checks and explanation for assertMemInhibit usage
Andreas Hansson
2014-12-02
mem: Remove redundant Packet::allocate calls
Andreas Hansson
2014-12-02
mem: Add const getters for write packet data
Andreas Hansson
2014-10-21
mem: don't inhibit WriteInv's or defer snoops on their MSHRs
Curtis Dunham
2014-10-29
mem: have WriteInvalidate obsolete MSHRs
Curtis Dunham
2014-10-09
mem: Add packet sanity checks to cache and MSHRs
Andreas Hansson
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