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path: root/src/mem/cache/cache_impl.hh
AgeCommit message (Expand)Author
2010-10-18cache: minor SC assertion fixSteve Reinhardt
2010-10-13Mem: Change the CLREX flag to CLEAR_LL.Gabe Black
2010-09-21cache: improve coherence handling of writebacksSteve Reinhardt
2010-09-09cache: fail SC when invalidated while waiting for busSteve Reinhardt
2010-09-09mem: fix functional accesses to deal with coherence changeSteve Reinhardt
2010-09-09cache: coherence protocol enhancements & bug fixesSteve Reinhardt
2010-08-26mem: fix m5.fast compile bug in previous csetSteve Reinhardt
2010-08-25cache: fix a bug in atomic multilevel snoopsSteve Reinhardt
2010-08-23MEM: Make CLREX a first class request operation and clear locks in caches whe...Gene Wu
2010-08-23ARM: Make sure that software prefetch instructions can't change the state of ...Gene Wu
2010-07-22Port: Only indicate that a SimpleTimingPort is drained if its send event isTimothy M. Jones
2010-07-08cache: fix bug in SC upgrade handlingSteve Reinhardt
2010-06-22cache: fix longstanding prefetcher bugSteve Reinhardt
2010-06-16cache: fail store conditionals when upgrade loses raceSteve Reinhardt
2010-06-16cache: fix dirty bit settingSteve Reinhardt
2010-02-23cache: Make caches sharing aware and add occupancy stats.Lisa Hsu
2010-01-12cache: make tags->insertBlock() and tags->accessBlock() context aware so that...Lisa Hsu
2009-09-26Minor cleanup: Use the blockAlign() method where it applies in the cache.Steve Reinhardt
2009-09-26Force prefetches to check cache and MSHRs immediately prior to issue.Steve Reinhardt
2009-08-01Fix setting of INST_FETCH flag for O3 CPU.Steve Reinhardt
2009-05-17includes: sort includes againNathan Binkert
2009-05-17types: Move stuff for global types into src/base/types.hhNathan Binkert
2008-07-16mem: use single BadAddr responder per system.Steve Reinhardt
2009-04-19Mem: Change isLlsc to isLLSC.Gabe Black
2009-04-19Memory: Rename LOCKED for load locked store conditional to LLSC.Gabe Black
2009-03-11cache: set dirty bit on swaps (oops!)Steve Reinhardt
2009-02-16Fixes to get prefetching working again.Steve Reinhardt
2008-11-10Cache: Refactor packet forwarding a bit.Steve Reinhardt
2008-11-04decouple eviction from insertion in the cache.Lisa Hsu
2008-11-04Change the findBlock(addr, lat) to accessBlock, which I think has better conn...Lisa Hsu
2008-11-04get rid of all instances of readTid() and getThreadNum(). Unify and eliminateLisa Hsu
2008-10-09eventq: convert all usage of events to use the new API.Nathan Binkert
2008-06-28Backed out changeset 94a7bb476fca: caused memory leak.Steve Reinhardt
2008-06-21Generate more useful error messages for unconnected ports.Steve Reinhardt
2008-06-13Get rid of bogus cache assertion.Steve Reinhardt
2008-03-25Fix handling of writeback-induced writebacks in atomic mode.Steve Reinhardt
2008-03-24Don't FastAlloc MSHRs since we don't allocate them on the fly.Steve Reinhardt
2008-03-22Fix cache problem with writes to tempBlockSteve Reinhardt
2008-03-17Fix a few Packet memory leaks.Steve Reinhardt
2008-03-15Fix subtle cache bug where read could return stale dataSteve Reinhardt
2008-02-26Revamp cache timing access mshr check to make stats sane again.Steve Reinhardt
2008-02-26Cache: better comments particularly regarding writeback situation.Steve Reinhardt
2008-02-16Make L2+ caches allocate new block for writeback missesSteve Reinhardt
2008-02-10Fix #include lines for renamed cache files.Steve Reinhardt
2008-01-06Temporary fix for ll/sc bug see flyspray task for more info:Geoffrey Blake
2008-01-02Add ReadRespWithInvalidate to handle multi-level coherence situationSteve Reinhardt
2008-01-02Don't DPRINTF in the middle of a PrintReq.Steve Reinhardt
2008-01-02Add functional PrintReq command for memory-system debugging.Steve Reinhardt
2008-01-02Fix formatting and comments in cache_impl.hhSteve Reinhardt
2007-11-16Tweak check for writable block fill.Steve Reinhardt
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