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gem5
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invisispec-with-dift
is-ift
is-ift-cachehit
is-rebase
is-rebase-new
is-rebase-new2
is-rebase-new3-rdtscp
is-rebase04-linux3.2
is-rebase05
is-rebase06-RequestPtr
is-rebase07-GCC8
is-rebase08-QoSmem
is-rebase09-linuxarm-3.7.0
is-rebase10-DynInstPtr
is-rebase11-LSQUnit
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src
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mem
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cache
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prefetch
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base.cc
Age
Commit message (
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Author
2018-04-27
sim,cpu,mem,arch: Introduced MasterInfo data structure
Giacomo Travaglini
2016-11-09
style: [patch 1/22] use /r/3648/ to reorganize includes
Brandon Potter
2016-06-06
sim: Call regStats of base-class as well
Stephan Diestelhorst
2016-04-07
mem: Handful extra features for BasePrefetcher
Rekai Gonzalez Alberquilla
2015-07-03
mem: Add clean evicts to improve snoop filter tracking
Ali Jafri
2014-12-23
mem: Hide WriteInvalidate requests from prefetchers
Curtis Dunham
2014-12-23
mem: Rework the structuring of the prefetchers
Mitch Hayenga
2014-10-16
mem: Dynamically determine page bytes in memory components
Andreas Hansson
2014-09-09
misc: Fix a number of unitialised variables and members
Andreas Hansson
2014-09-03
arch: Cleanup unused ISA traits constants
Andreas Hansson
2014-01-29
mem: prefetcher: add options, support for unaligned addresses
Mitch Hayenga ext:(%2C%20Amin%20Farmahini%20%3Caminfar%40gmail.com%3E)
2014-01-24
mem: Add support for a security bit in the memory system
Giacomo Gabrielli
2014-01-24
mem: per-thread cache occupancy and per-block ages
Dam Sunwoo
2013-02-19
mem: Add deferred packet class to prefetcher
Andreas Hansson
2013-02-19
sim: Make clock private and access using clockPeriod()
Andreas Hansson
2012-10-15
Mem: Use cycles to express cache-related latencies
Andreas Hansson
2012-05-10
gem5: fix some iterator use and erase bugs
Ali Saidi
2012-04-14
MEM: Remove the Broadcast destination from the packet
Andreas Hansson
2012-02-12
mem: Add a master ID to each request object.
Ali Saidi
2012-02-12
prefetcher: Make prefetcher a sim object instead of it being a parameter on c...
Mrinmoy Ghosh
2011-09-01
Fix build for gcc-4.2 opt/fast
Lisa Hsu
2011-08-19
Prefetcher: Fix some memory leaks with the prefetcher.
Ali Saidi
2011-04-15
trace: reimplement the DTRACE function so it doesn't use a vector
Nathan Binkert
2011-04-15
includes: sort all includes
Nathan Binkert
2009-09-26
Force prefetches to check cache and MSHRs immediately prior to issue.
Steve Reinhardt
2009-09-23
arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
Nathan Binkert
2009-04-20
request: rename INST_READ to INST_FETCH.
Steve Reinhardt
2009-02-16
Fixes to get prefetching working again.
Steve Reinhardt
2008-11-02
Add in Context IDs to the simulator. From now on, cpuId is almost never used,
Lisa Hsu
2008-02-10
Fix #include lines for renamed cache files.
Steve Reinhardt
2008-02-10
Rename cache files for brevity and consistency with rest of tree.
Steve Reinhardt