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path: root/src/mem/cache/tags/cacheset.hh
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2018-10-10mem-cache: Remove CacheSet.hhDaniel R. Carvalho
Replacement policies aren't aware of cache sets and do not organize blocks based on replacement data. Block search is independent of block placement. Besides, indexing policies have their own way of addressing the sets, therefore there is no need to use this class anymore. BlkType has been removed, as it wasn't being used. Change-Id: Ia79c2a491e59f295c8d60a0466c317eb0e2bdab9 Signed-off-by: Daniel R. Carvalho <odanrc@yahoo.com.br> Reviewed-on: https://gem5-review.googlesource.com/c/9782 Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
2018-05-31mem-cache: Fix include directives in the cache related classesNikos Nikoleris
Change-Id: I111b0f662897c43974aadb08da1ed85c7542585c Reviewed-on: https://gem5-review.googlesource.com/10433 Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
2018-02-24mem-cache: Fix CacheSet memory leakDaniel R. Carvalho
CacheSet blocks were being allocated but never freed. Used vector to avoid using pure C array. Change-Id: I6f32fa5a305ff4e1d7602535026c1396764102ed Reviewed-on: https://gem5-review.googlesource.com/8603 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
2016-05-26mem: fix headers include order in the cache related classesNikos Nikoleris
Change-Id: Ia57cc104978861ab342720654e408dbbfcbe4b69 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2016-05-26mem: change NULL to nullptr in the cache related classesNikos Nikoleris
Change-Id: I5042410be54935650b7d05c84d8d9efbfcc06e70 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
2015-09-04mem: Tidy up CacheSetAndreas Hansson
Minor tweaks and house keeping.
2014-01-24mem: Add support for a security bit in the memory systemGiacomo Gabrielli
This patch adds the basic building blocks required to support e.g. ARM TrustZone by discerning secure and non-secure memory accesses.
2013-06-27mem: Reorganize cache tags and make them a SimObjectPrakash Ramrakhyani
This patch reorganizes the cache tags to allow more flexibility to implement new replacement policies. The base tags class is now a clocked object so that derived classes can use a clock if they need one. Also having deriving from SimObject allows specialized Tag classes to be swapped in/out in .py files. The cache set is now templatized to allow it to contain customized cache blocks with additional informaiton. This involved moving code to the .hh file and removing cacheset.cc. The statistics belonging to the cache tags are now including ".tags" in their name. Hence, the stats need an update to reflect the change in naming.
2012-06-29Cache: Fix the LRU policy for classic memory hierarchyLena Olson
The LRU policy always evicted the least recently touched way, even if it contained valid data and another way was invalid, as can happen if a block has been invalidated by coherance. This can result in caches never warming up even though they are replacing blocks. This modifies the LRU policy to move blocks to LRU position on invalidation.
2011-04-15includes: sort all includesNathan Binkert
2010-02-23cache: pull CacheSet out of LRU so that other tags can use associative sets.Lisa Hsu