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Age
Commit message (
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Author
2008-02-16
Make L2+ caches allocate new block for writeback misses
Steve Reinhardt
2008-02-10
Fix #include lines for renamed cache files.
Steve Reinhardt
2008-02-10
Rename cache files for brevity and consistency with rest of tree.
Steve Reinhardt
2008-01-06
Temporary fix for ll/sc bug see flyspray task for more info:
Geoffrey Blake
2008-01-02
Add ReadRespWithInvalidate to handle multi-level coherence situation
Steve Reinhardt
2008-01-02
Mark cache-to-cache MSHRs as downstreamPending when necessary.
Steve Reinhardt
2008-01-02
Don't DPRINTF in the middle of a PrintReq.
Steve Reinhardt
2008-01-02
Additional comments and helper functions for PrintReq.
Steve Reinhardt
2008-01-02
Add functional PrintReq command for memory-system debugging.
Steve Reinhardt
2008-01-02
Fix formatting and comments in cache_impl.hh
Steve Reinhardt
2007-11-16
Tweak check for writable block fill.
Steve Reinhardt
2007-11-16
Fix bug on exclusive response to ReadReq with pending WriteReq.
Steve Reinhardt
2007-11-04
Cache: Fix for OS X 10.5 compiling.
Ali Saidi
2007-10-31
Merge in bus DPRINTF changes.
Steve Reinhardt
2007-10-31
Traceflags: Add SCons function to created a traceflag instead of having one f...
Ali Saidi
2007-09-16
mem: clean up bus/cache DPRINTFs a bit
Steve Reinhardt
2007-08-30
params: Deprecate old-style constructors; update most SimObject constructors.
Miles Kaufmann
2007-08-26
Merge with head
Gabe Black
2007-08-12
MemorySystem: Fix the use of ?: to produce correct results.
Ali Saidi
2007-08-10
DMA: Add IOCache and fix bus bridge to optionally only send requests one
Ali Saidi
2007-08-03
cache: get rid of obsolete params from python.
Steve Reinhardt
2007-07-29
memory system: fix functional access bug.
Steve Reinhardt
2007-07-27
cache/memtest: fixes for functional accesses.
Steve Reinhardt
2007-07-27
cache: Get rid of unused variable.
Steve Reinhardt
2007-07-26
Merge python and x86 changes with cache branch
Nathan Binkert
2007-07-26
Have owner respond to UpgradeReq to avoid race.
Steve Reinhardt
2007-07-26
Add downward express snoops for invalidations.
Steve Reinhardt
2007-07-26
Continue snooping after a writeback is encountered.
Steve Reinhardt
2007-07-25
Can't block on memInhibit packets
Steve Reinhardt
2007-07-23
A couple more minor bug fixes for multilevel coherence.
Steve Reinhardt
2007-07-23
Major changes to how SimObjects are created and initialized. Almost all
Nathan Binkert
2007-07-22
Replace lowerMSHRPending flag with more robust scheme
Steve Reinhardt
2007-07-22
Replace DeferredSnoop flag with LowerMSHRPending flag.
Steve Reinhardt
2007-07-22
A few minor non-debug compilation issues.
Steve Reinhardt
2007-07-21
Deal with invalidations intersecting outstanding upgrades.
Steve Reinhardt
2007-07-21
Several more fixes for multi-level timing coherence.
Steve Reinhardt
2007-07-17
Forward cache-to-cache responses through other caches.
Steve Reinhardt
2007-07-17
Assert that an mshr has a target in getTarget().
Steve Reinhardt
2007-07-15
Fix up a bunch of multilevel coherence issues.
Steve Reinhardt
2007-07-14
Add CacheRepl trace flag and move a couple DPRINTFs to it.
Steve Reinhardt
2007-07-14
Move a couple of DPRINTFs from Cache to CachePort.
Steve Reinhardt
2007-07-14
Fix & tweak DPRINTFs for tracediff w/new cache code.
Steve Reinhardt
2007-07-03
Delete packets when we're done with them.
Steve Reinhardt
2007-07-02
Couple more minor bug fixes for FS timing mode.
Steve Reinhardt
2007-06-30
Get rid of remaining traces of obsolete CoherenceProtocol object.
Steve Reinhardt
2007-06-30
Factor out a little more common code.
Steve Reinhardt
2007-06-30
Fix up a few statistics problems.
Steve Reinhardt
2007-06-30
Get rid of Packet result field. Error responses are
Steve Reinhardt
2007-06-27
Get rid of coherence protocol object.
Steve Reinhardt
2007-06-26
Revamp replacement-of-upgrade handling.
Steve Reinhardt
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