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path: root/src/mem/cache
AgeCommit message (Expand)Author
2017-03-03mem: Make blkAlign a common function between all tag classesNikos Nikoleris
2017-03-03mem: Use pkt::getBlockAddr instead of BaseCace::blockAlignNikos Nikoleris
2017-02-21mem: Remove unused size field from the CacheBlk classNikos Nikoleris
2017-02-21mem: Remove the unused asid field from the CacheBlk classNikos Nikoleris
2017-02-21mem: Remove unused arguments (asid/contex_id) from accessBlockNikos Nikoleris
2017-02-21mem: Remove unused type BlkList from the cache and the tagsNikos Nikoleris
2017-02-21mem: Remove unused functions from the tag classesNikos Nikoleris
2017-02-21mem: Always use the helper function to invalidate a blockNikos Nikoleris
2017-02-21mem: Fix MSHR assert triggering for invalidated prefetchesSascha Bischoff
2017-02-21mem: Populate the secure flag in the writeback visitorNikos Nikoleris
2017-02-21mem: Remove stale argument from a panic statementNikos Nikoleris
2017-02-19sim: Ensure draining is deterministicAndreas Hansson
2017-02-19mem: Ensure deferred snoops are cache-line alignedAndreas Hansson
2017-02-11mem: fix printing of 1st cache tags lineBjoern A. Zeeb
2016-11-09style: [patch 3/22] reduce include dependencies in some headersBrandon Potter
2016-11-09style: [patch 1/22] use /r/3648/ to reorganize includesBrandon Potter
2016-12-05mem: Respond to InvalidateReq when the block is (pending) dirtyNikos Nikoleris
2016-12-05mem: Invalidate a blk when servicing the 1st invalidating targetNikos Nikoleris
2016-12-05mem: Allow non invalidating snoops on an InvalidateReq MSHRNikos Nikoleris
2016-12-05mem: Always use InvalidateReq to service WriteLineReq missesNikos Nikoleris
2016-12-05mem: Ensure InvalidateReq is considered isForward by MSHRsAndreas Hansson
2016-12-05mem: Make packet debug printing more uniformNikos Nikoleris
2016-12-05mem: Service only the 1st FromCPU MSHR target on ReadRespWithInvNikos Nikoleris
2016-12-05mem: Keep track of allocOnFill in the TargetListNikos Nikoleris
2016-12-05mem: Add support for repopulating the flags of an MSHR TargetListNikos Nikoleris
2016-11-30mem: Split the hit_latency into tag_latency and data_latencySophiane Senni
2016-08-15mem: Print an MSHR without triggering any assertionsNikos Nikoleris
2016-08-12mem: Update mostly exclusive policy even furtherAndreas Hansson
2016-08-12mem: Update mostly exclusive cache policy to cover more casesAndreas Hansson
2016-08-12mem: Add a FromCache packet attributeAndreas Hansson
2016-07-11mem: Remove stale argument from a DPRINTF in the cache codeNikos Nikoleris
2016-06-06sim: Call regStats of base-class as wellStephan Diestelhorst
2016-05-26mem: Fix memory leak in handling of deferred snoopsAndreas Hansson
2016-05-26mem: Do not set cacheResponding on MSHR snoop if not respondingAndreas Hansson
2016-05-26mem: fix headers include order in the cache related classesNikos Nikoleris
2016-05-26mem: remove redudant check whether the cache forwards snoopsNikos Nikoleris
2016-05-26mem: change NULL to nullptr in the cache related classesNikos Nikoleris
2016-05-26mem: fix the line length in the cache related classesNikos Nikoleris
2016-04-21mem: Include WriteLineReq in cache demand statsAndreas Hansson
2016-04-21mem: Remove unused cache statsAndreas Hansson
2016-04-21mem: Deallocate all write-queue entries when sentAndreas Hansson
2016-04-21mem: Align downstream cache packet creation in atomic and timingAndreas Hansson
2016-04-07mem: Add priority to QueuedPrefetcherRekai Gonzalez Alberquilla
2016-04-07mem: Handful extra features for BasePrefetcherRekai Gonzalez Alberquilla
2015-05-27mem: Add unused prefetch counter in cachesRekai Gonzalez Alberquilla
2016-04-07mem: Remove threadId from memory request classMitch Hayenga
2016-04-06Revert power patch sets with unexpected interactionsAndreas Sandberg
2016-04-05mem: Remove threadId from memory request classMitch Hayenga
2016-03-17mem: Adjust cache queue reserve to more conservative valuesAndreas Hansson
2016-03-17mem: Create a separate class for the cache write bufferAndreas Hansson