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Age
Commit message (
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Author
2007-05-21
Change getDeviceAddressRanges to use bool for snoop arg.
Steve Reinhardt
2007-05-14
Merge vm1.(none):/home/stever/bk/newmem-head
Steve Reinhardt
2007-05-14
add uglyiness to fix dmas
Ali Saidi
2007-05-13
Eliminate unused PacketPtr from BaseCache's
Steve Reinhardt
2007-05-13
Split BaseCache::CacheEvent into RequestEvent and ResponseEvent.
Steve Reinhardt
2007-05-10
remove hit_latency and make latency do the right thing
Ali Saidi
2007-05-09
add a backoff algorithm when nacks are received by devices
Ali Saidi
2007-04-04
The MemoryObject tha owns a port should delete it if it so chooses when delet...
Ali Saidi
2007-03-28
Call compare and Swap on the target, not the response.
Ron Dreslinski
2007-03-27
Merge zizzer:/bk/newmem
Ron Dreslinski
2007-03-27
First Pass At Cmp/Swap in caches
Ron Dreslinski
2007-03-23
Merge ktlim@zizzer:/bk/newmem
Kevin Lim
2007-03-23
3 memory system fixes:
Kevin Lim
2007-03-12
Clean up more memory leaks
Ron Dreslinski
2007-03-12
Fix some of the memory leaks related to writebacks
Ron Dreslinski
2007-03-10
Rework the way SCons recurses into subdirectories, making it
Nathan Binkert
2007-03-08
stop m5 from leaking like a sieve
Ali Saidi
2007-03-06
Move all of the parameters of the Root SimObject so they are
Nathan Binkert
2007-02-12
rename store conditional stuff as extra data so it can be used for conditiona...
Ali Saidi
2007-02-07
Merge zizzer.eecs.umich.edu:/bk/newmem
Steve Reinhardt
2007-02-07
Make memory commands dense again to avoid cache stat table explosion.
Steve Reinhardt
2007-02-06
Minor DPRINTF fixes.
Steve Reinhardt
2007-02-06
Fix for LL/SC that Ron sent me.
Kevin Lim
2007-01-26
make our code a little more standards compliant
Ali Saidi
2006-12-18
Streamline Cache/Tags interface: get rid of redundant functions,
Steve Reinhardt
2006-12-18
No need to template prefetcher on cache TagStore type.
Steve Reinhardt
2006-12-18
Get rid of generic CacheTags object (fold back into Cache).
Steve Reinhardt
2006-12-13
Split CachePort class into CpuSidePort and MemSidePort
Steve Reinhardt
2006-12-05
Don't compress data on writebacks unless it's actually necessary.
Steve Reinhardt
2006-12-04
Turn cache MissQueue/BlockingBuffer into virtual object
Steve Reinhardt
2006-12-02
Make cache compression policy a runtime virtual thing
Steve Reinhardt
2006-11-28
Remove assertion. It's not needed and messes up writebacks when a 2 level ca...
Kevin Lim
2006-11-22
Do a functional access to levels above on a read as a temporary solution for ...
Ron Dreslinski
2006-11-13
Fix a bug to handle the fact that a CPU can send Functional accesses while a ...
Ron Dreslinski
2006-11-13
If we didn't satisfy all targets, reset the packet we are requesting with.
Ron Dreslinski
2006-11-13
Since cpus now send out snoop ranges, remove it from the cache.
Ron Dreslinski
2006-11-12
Handle packets being deleted by lower level properly.
Ron Dreslinski
2006-11-12
Don't insert reponses into the list more than once
Ron Dreslinski
2006-11-12
Move code before a early return to make sure it is executed on all paths
Ron Dreslinski
2006-11-12
Yet another small bug in mem system related to flow control
Ron Dreslinski
2006-11-12
Fix functional access errors related to delayed respnoses in cachePort
Ron Dreslinski
2006-11-10
More fixes for functional accesses. It now makes the writeback memory leak t...
Ron Dreslinski
2006-11-07
Fix up bus draining and add draining to the caches.
Kevin Lim
2006-11-02
Caches return a new functional port whenever asked for one.
Kevin Lim
2006-10-31
Ports now have a pointer to the MemObject that owns it (can be NULL).
Kevin Lim
2006-10-22
Clean up cache DPRINTFs
Steve Reinhardt
2006-10-22
s/pktuest/request/ (all in comments)
Steve Reinhardt
2006-10-21
Small bug fixes for timing LL/SC. Better now but
Steve Reinhardt
2006-10-21
Just give up if a store conditional misses completely
Steve Reinhardt
2006-10-21
Refactor coherence state table initialization.
Steve Reinhardt
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