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path: root/src/mem/cache
AgeCommit message (Expand)Author
2008-01-06Temporary fix for ll/sc bug see flyspray task for more info:Geoffrey Blake
2008-01-02Add ReadRespWithInvalidate to handle multi-level coherence situationSteve Reinhardt
2008-01-02Mark cache-to-cache MSHRs as downstreamPending when necessary.Steve Reinhardt
2008-01-02Don't DPRINTF in the middle of a PrintReq.Steve Reinhardt
2008-01-02Additional comments and helper functions for PrintReq.Steve Reinhardt
2008-01-02Add functional PrintReq command for memory-system debugging.Steve Reinhardt
2008-01-02Fix formatting and comments in cache_impl.hhSteve Reinhardt
2007-11-16Tweak check for writable block fill.Steve Reinhardt
2007-11-16Fix bug on exclusive response to ReadReq with pending WriteReq.Steve Reinhardt
2007-11-04Cache: Fix for OS X 10.5 compiling.Ali Saidi
2007-10-31Merge in bus DPRINTF changes.Steve Reinhardt
2007-10-31Traceflags: Add SCons function to created a traceflag instead of having one f...Ali Saidi
2007-09-16mem: clean up bus/cache DPRINTFs a bitSteve Reinhardt
2007-08-30params: Deprecate old-style constructors; update most SimObject constructors.Miles Kaufmann
2007-08-26Merge with headGabe Black
2007-08-12MemorySystem: Fix the use of ?: to produce correct results.Ali Saidi
2007-08-10DMA: Add IOCache and fix bus bridge to optionally only send requests oneAli Saidi
2007-08-03cache: get rid of obsolete params from python.Steve Reinhardt
2007-07-29memory system: fix functional access bug.Steve Reinhardt
2007-07-27cache/memtest: fixes for functional accesses.Steve Reinhardt
2007-07-27cache: Get rid of unused variable.Steve Reinhardt
2007-07-26Merge python and x86 changes with cache branchNathan Binkert
2007-07-26Have owner respond to UpgradeReq to avoid race.Steve Reinhardt
2007-07-26Add downward express snoops for invalidations.Steve Reinhardt
2007-07-26Continue snooping after a writeback is encountered.Steve Reinhardt
2007-07-25Can't block on memInhibit packetsSteve Reinhardt
2007-07-23A couple more minor bug fixes for multilevel coherence.Steve Reinhardt
2007-07-23Major changes to how SimObjects are created and initialized. Almost allNathan Binkert
2007-07-22Replace lowerMSHRPending flag with more robust schemeSteve Reinhardt
2007-07-22Replace DeferredSnoop flag with LowerMSHRPending flag.Steve Reinhardt
2007-07-22A few minor non-debug compilation issues.Steve Reinhardt
2007-07-21Deal with invalidations intersecting outstanding upgrades.Steve Reinhardt
2007-07-21Several more fixes for multi-level timing coherence.Steve Reinhardt
2007-07-17Forward cache-to-cache responses through other caches.Steve Reinhardt
2007-07-17Assert that an mshr has a target in getTarget().Steve Reinhardt
2007-07-15Fix up a bunch of multilevel coherence issues.Steve Reinhardt
2007-07-14Add CacheRepl trace flag and move a couple DPRINTFs to it.Steve Reinhardt
2007-07-14Move a couple of DPRINTFs from Cache to CachePort.Steve Reinhardt
2007-07-14Fix & tweak DPRINTFs for tracediff w/new cache code.Steve Reinhardt
2007-07-03Delete packets when we're done with them.Steve Reinhardt
2007-07-02Couple more minor bug fixes for FS timing mode.Steve Reinhardt
2007-06-30Get rid of remaining traces of obsolete CoherenceProtocol object.Steve Reinhardt
2007-06-30Factor out a little more common code.Steve Reinhardt
2007-06-30Fix up a few statistics problems.Steve Reinhardt
2007-06-30Get rid of Packet result field. Error responses areSteve Reinhardt
2007-06-27Get rid of coherence protocol object.Steve Reinhardt
2007-06-26Revamp replacement-of-upgrade handling.Steve Reinhardt
2007-06-26Handle deferred snoops better.Steve Reinhardt
2007-06-26cache_impl.hh:Steve Reinhardt
2007-06-26Handle replacement of block with pending upgrade.Steve Reinhardt
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