| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2018-01-23 | x86, mem: Rewrite the multilevel page table class. | Gabe Black | |
| The new version extracts all the x86 specific aspects of the class, and builds the interface around a variable collection of template arguments which are classes that represent the different levels of the page table. The multilevel page table class is now much more ISA independent. Change-Id: Id42e168a78d0e70f80ab2438480cb6e00a3aa636 Reviewed-on: https://gem5-review.googlesource.com/7347 Reviewed-by: Brandon Potter <Brandon.Potter@amd.com> Maintainer: Gabe Black <gabeblack@google.com> | |||
| 2014-04-01 | mem: adding a multi-level page table class | Alexandru | |
| This patch defines a multi-level page table class that stores the page table in system memory, consistent with ISA specifications. In this way, cpu models that use the actual hardware to execute (e.g. KvmCPU), are able to traverse the page table. | |||
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