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physical.cc
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Author
2011-04-15
trace: reimplement the DTRACE function so it doesn't use a vector
Nathan Binkert
2011-04-15
includes: sort all includes
Nathan Binkert
2011-03-01
Spelling: Fix the a spelling error by changing mmaped to mmapped.
Gabe Black
2011-02-23
Mem: Print out memory when access > 8 bytes
Ali Saidi
2011-02-23
Includes: Don't include isa_traits.hh and use the TheISA namespace unless rea...
Ali Saidi
2010-11-19
SE: Fix simulating more than 4GB of RAM in SE mode
Ali Saidi
2010-11-08
ARM: Add checkpointing support
Ali Saidi
2010-11-08
Mem: Finish half-baked support for mmaping file in physmem.
Ali Saidi
2010-01-19
util: do checkpoint aggregation more cleanly, fix last changeset.
Lisa Hsu
2009-11-04
build: fix compile problems pointed out by gcc 4.4
Nathan Binkert
2009-09-23
arch: nuke arch/isa_specific.hh and move stuff to generated config/the_isa.hh
Nathan Binkert
2009-08-01
Fix setting of INST_FETCH flag for O3 CPU.
Steve Reinhardt
2009-07-08
Registers: Add a registers.hh file as an ISA switched header.
Gabe Black
2009-06-04
types: clean up types, especially signed vs unsigned
Nathan Binkert
2009-05-17
includes: sort includes again
Nathan Binkert
2009-05-17
types: Move stuff for global types into src/base/types.hh
Nathan Binkert
2009-04-19
Mem: Change isLlsc to isLLSC.
Gabe Black
2009-04-19
Memory: Rename LOCKED for load locked store conditional to LLSC.
Gabe Black
2008-11-02
Add in Context IDs to the simulator. From now on, cpuId is almost never used,
Lisa Hsu
2008-10-09
eventq: convert all usage of events to use the new API.
Nathan Binkert
2008-06-15
physmem: Add a null option to physical memory so it doesn't store data.
Nathan Binkert
2008-04-10
PhysicalMemory: Add parameter for variance in memory delay.
Ali Saidi
2008-01-02
Additional comments and helper functions for PrintReq.
Steve Reinhardt
2008-01-02
Add functional PrintReq command for memory-system debugging.
Steve Reinhardt
2007-11-19
Memory: Cache the physical memory start and size so we don't need a dynamic c...
Ali Saidi
2007-11-14
remove unnecessary debug messages I added
Korey Sewell
2007-11-13
Add in files from merge-bare-iron, get them compiling in FS and SE mode
Korey Sewell
2007-07-29
memory system: fix functional access bug.
Steve Reinhardt
2007-07-26
Merge python and x86 changes with cache branch
Nathan Binkert
2007-07-23
Major changes to how SimObjects are created and initialized. Almost all
Nathan Binkert
2007-06-30
Get rid of Packet result field. Error responses are
Steve Reinhardt
2007-06-17
More major reorg of cache. Seems to work for atomic mode now,
Steve Reinhardt
2007-05-28
Restructure SimpleTimingPort a bit:
Steve Reinhardt
2007-05-21
Change getDeviceAddressRanges to use bool for snoop arg.
Steve Reinhardt
2007-05-20
Insist that PhysicalMemory object have at least one connection.
Steve Reinhardt
2007-05-19
Oops... some places in C++ explicitly ask for a "functional"
Steve Reinhardt
2007-05-19
PhysicalMemory has vector of uniform ports instead of one special one.
Steve Reinhardt
2007-02-12
some forgotten commits
Ali Saidi
2007-02-12
rename store conditional stuff as extra data so it can be used for conditiona...
Ali Saidi
2007-01-26
make our code a little more standards compliant
Ali Saidi
2006-12-27
Change MemoryAccess dprintfs to print the data as well
Ali Saidi
2006-11-22
Added a parameter to set memory to zero. This is to support Legion, and once ...
Gabe Black
2006-11-20
Fix an assert to correctly make sure a request falls entirely inside a memory.
Gabe Black
2006-11-12
Physical memory overrides the tport version of recvFunctional, need to do the
Ron Dreslinski
2006-11-09
Get SPARC to the point that it starts running. Add ability to load the ROM bi...
Ali Saidi
2006-10-20
Use PacketPtr everywhere
Nathan Binkert
2006-10-19
refactor code for the packet, get rid of packet_impl.hh
Nathan Binkert
2006-10-12
Fix problems with unCacheable addresses in timing-coherence
Ron Dreslinski
2006-10-09
Merge ktlim@zizzer:/bk/newmem
Kevin Lim
2006-10-09
Make memtest work with 8 memtesters
Ron Dreslinski
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