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path: root/src/mem/protocol/MI_example-cache.sm
AgeCommit message (Expand)Author
2015-08-14ruby: drop the [] notation for lookup function.Nilay Vaish
2015-08-14ruby: replace Address by AddrNilay Vaish
2015-08-14ruby: rename variables Addr to addrNilay Vaish
2015-08-14ruby: Protocol changes for SimObject MessageBuffersJoel Hestness
2014-11-06ruby: coherence protocols: remove data block from dirctory entryNilay Vaish
2014-09-01ruby: message buffers: significant changesNilay Vaish
2014-09-01ruby: slicc: change the way configurable members are specifiedNilay Vaish
2014-05-23ruby: message buffer: drop dequeue_getDelayCycles()Nilay Vaish
2014-04-08ruby: slicc: change enqueue statementNilay Vaish
2013-06-25ruby: profiler: lots of inter-related changesNilay Vaish
2013-06-24ruby: remove the three files related to profilingNilay Vaish
2013-06-18ruby: restrict Address to being a type and not a variable nameLena Olson
2013-05-21ruby: add stats to .sm files, remove cache profilerNilay Vaish ext:(%2C%20Malek%20Musleh%20%3Cmalek.musleh%40gmail.com%3E)
2013-02-10ruby: MI protocol: add a missing transitionNilay Vaish
2013-02-10ruby: replaces Time with Cycles in many placesNilay Vaish
2012-12-11ruby: change slicc to allow for constructor argsNilay Vaish
2012-10-15ruby: improved support for functional accessesNilay Vaish
2012-10-02ruby: rename template_hack to templateNilay Vaish
2012-09-30MI coherence protocol: add copyright noticeNilay Vaish
2012-01-23O3, Ruby: Forward invalidations from Ruby to O3 CPUNilay Vaish
2011-06-30Ruby: Add support for functional accessesBrad Beckmann ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E)
2011-06-08Ruby: Correctly set access permissions for directory entriesNilay Vaish
2011-05-20slicc: added vnet_type to MI_exampleTushar Krishna
2011-03-22Ruby: Remove CacheMsg class from SLICCNilay Vaish
2011-03-19Ruby: Convert CacheRequestType to RubyRequestTypeNilay Vaish
2011-03-18SLICC: Remove external_type for structuresNilay Vaish
2011-02-23ruby: automate permission settingBrad Beckmann
2011-01-17Change interface between coherence protocols and CacheMemoryNilay Vaish
2010-12-01ruby: Converted old ruby debug calls to M5 debug callsNilay Vaish
2010-08-20ruby: Reincarnated the responding machine profilingBrad Beckmann
2010-03-21ruby: Reordered protocol buffersBrad Beckmann
2010-01-29ruby: MI_example updates to use the new config systemBrad Beckmann
2010-01-19ruby: new atomics implementationDerek Hower
2009-09-10protocol: made MI_example work with unordered networksDerek Hower
2009-08-04slicc: added MOESI_CMP_directory, DMA SequencerMsg, parameterized controllersDerek Hower
2009-07-20ruby: moved cache stats from Profiler to CacheMemoryDerek Hower
2009-07-06ruby: Import the latest ruby changes from gems.Nathan Binkert
2009-05-11ruby: Import ruby and slicc from GEMSNathan Binkert