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MI_example-cache.sm
Age
Commit message (
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Author
2015-09-18
ruby: print addresses in hex
Nilay Vaish
2015-09-16
ruby: message buffer, timer table: significant changes
Nilay Vaish
2015-09-05
ruby: call setMRU from L1 controllers, not from sequencer
Nilay Vaish
2015-09-05
ruby: declare all protocol message buffers as parameters
Nilay Vaish
2015-08-19
ruby: reverts to changeset: bf82f1f7b040
Nilay Vaish
2015-08-14
ruby: call setMRU from L1 controllers, not from sequencer
Nilay Vaish
2015-08-14
ruby: drop the [] notation for lookup function.
Nilay Vaish
2015-08-14
ruby: replace Address by Addr
Nilay Vaish
2015-08-14
ruby: rename variables Addr to addr
Nilay Vaish
2015-08-14
ruby: Protocol changes for SimObject MessageBuffers
Joel Hestness
2014-11-06
ruby: coherence protocols: remove data block from dirctory entry
Nilay Vaish
2014-09-01
ruby: message buffers: significant changes
Nilay Vaish
2014-09-01
ruby: slicc: change the way configurable members are specified
Nilay Vaish
2014-05-23
ruby: message buffer: drop dequeue_getDelayCycles()
Nilay Vaish
2014-04-08
ruby: slicc: change enqueue statement
Nilay Vaish
2013-06-25
ruby: profiler: lots of inter-related changes
Nilay Vaish
2013-06-24
ruby: remove the three files related to profiling
Nilay Vaish
2013-06-18
ruby: restrict Address to being a type and not a variable name
Lena Olson
2013-05-21
ruby: add stats to .sm files, remove cache profiler
Nilay Vaish ext:(%2C%20Malek%20Musleh%20%3Cmalek.musleh%40gmail.com%3E)
2013-02-10
ruby: MI protocol: add a missing transition
Nilay Vaish
2013-02-10
ruby: replaces Time with Cycles in many places
Nilay Vaish
2012-12-11
ruby: change slicc to allow for constructor args
Nilay Vaish
2012-10-15
ruby: improved support for functional accesses
Nilay Vaish
2012-10-02
ruby: rename template_hack to template
Nilay Vaish
2012-09-30
MI coherence protocol: add copyright notice
Nilay Vaish
2012-01-23
O3, Ruby: Forward invalidations from Ruby to O3 CPU
Nilay Vaish
2011-06-30
Ruby: Add support for functional accesses
Brad Beckmann ext:(%2C%20Nilay%20Vaish%20%3Cnilay%40cs.wisc.edu%3E)
2011-06-08
Ruby: Correctly set access permissions for directory entries
Nilay Vaish
2011-05-20
slicc: added vnet_type to MI_example
Tushar Krishna
2011-03-22
Ruby: Remove CacheMsg class from SLICC
Nilay Vaish
2011-03-19
Ruby: Convert CacheRequestType to RubyRequestType
Nilay Vaish
2011-03-18
SLICC: Remove external_type for structures
Nilay Vaish
2011-02-23
ruby: automate permission setting
Brad Beckmann
2011-01-17
Change interface between coherence protocols and CacheMemory
Nilay Vaish
2010-12-01
ruby: Converted old ruby debug calls to M5 debug calls
Nilay Vaish
2010-08-20
ruby: Reincarnated the responding machine profiling
Brad Beckmann
2010-03-21
ruby: Reordered protocol buffers
Brad Beckmann
2010-01-29
ruby: MI_example updates to use the new config system
Brad Beckmann
2010-01-19
ruby: new atomics implementation
Derek Hower
2009-09-10
protocol: made MI_example work with unordered networks
Derek Hower
2009-08-04
slicc: added MOESI_CMP_directory, DMA SequencerMsg, parameterized controllers
Derek Hower
2009-07-20
ruby: moved cache stats from Profiler to CacheMemory
Derek Hower
2009-07-06
ruby: Import the latest ruby changes from gems.
Nathan Binkert
2009-05-11
ruby: Import ruby and slicc from GEMS
Nathan Binkert