Age | Commit message (Expand) | Author |
2011-01-17 | Change interface between coherence protocols and CacheMemory | Nilay Vaish |
2010-12-01 | ruby: Converted old ruby debug calls to M5 debug calls | Nilay Vaish |
2010-03-21 | ruby: Reordered protocol buffers | Brad Beckmann |
2010-03-21 | ruby: Ruby support for sparse memory | Brad Beckmann |
2010-02-10 | ruby: Initialize sender in MI_example-dir | Brad Beckmann |
2010-01-29 | ruby: MI_example updates to use the new config system | Brad Beckmann |
2010-01-19 | merge | Derek Hower |
2009-12-04 | ruby: cleaned up ruby-lang configuration | Derek Hower |
2009-11-18 | ruby: fixed dma mi example to work with multiple dma ports | Brad Beckmann |
2009-09-11 | MI data corruption bug fix | Polina Dudnik |
2009-08-28 | imported patch mi_patch | Polina Dudnik |
2009-08-05 | protocol: made MI_example dma mapping generic | Derek Hower |
2009-08-04 | slicc: added MOESI_CMP_directory, DMA SequencerMsg, parameterized controllers | Derek Hower |
2009-07-18 | ruby: fixed dma sequencer bug | Derek Hower |
2009-07-08 | slicc: fixed MI_example bug. The directory wasn't deallocating the TBE, lead... | Derek Hower |
2009-07-08 | slicc: Fixed MI_example bug. The directory was not writing data to DRAM afte... | Derek Hower |
2009-07-06 | ruby: Import the latest ruby changes from gems. | Nathan Binkert |
2009-05-11 | ruby: Import ruby and slicc from GEMS | Nathan Binkert |