gem5 - gem5

Age	Commit message (Collapse)	Author
2010-08-20	ruby: Resurrected Ruby's deterministic tests	Brad Beckmann
	Added the request series and invalidate deterministic tests as new cpu models and removed the no longer needed ruby tests --HG-- rename : configs/example/rubytest.py => configs/example/determ_test.py rename : src/mem/ruby/tester/DetermGETXGenerator.cc => src/cpu/directedtest/DirectedGenerator.cc rename : src/mem/ruby/tester/DetermGETXGenerator.hh => src/cpu/directedtest/DirectedGenerator.hh rename : src/mem/ruby/tester/DetermGETXGenerator.cc => src/cpu/directedtest/InvalidateGenerator.cc rename : src/mem/ruby/tester/DetermGETXGenerator.hh => src/cpu/directedtest/InvalidateGenerator.hh rename : src/cpu/rubytest/RubyTester.cc => src/cpu/directedtest/RubyDirectedTester.cc rename : src/cpu/rubytest/RubyTester.hh => src/cpu/directedtest/RubyDirectedTester.hh rename : src/mem/ruby/tester/DetermGETXGenerator.cc => src/cpu/directedtest/SeriesRequestGenerator.cc rename : src/mem/ruby/tester/DetermGETXGenerator.hh => src/cpu/directedtest/SeriesRequestGenerator.hh
2010-08-20	ruby: fix ruby llsc support to sync sc outcomes	Brad Beckmann
	Added support so that ruby can determine the outcome of store conditional operations and reflect that outcome to M5 physical memory and cpus.
2010-08-20	ruby: Added bcast msg profiling to hammer and token	Brad Beckmann

2010-04-02	ruby: get "using namespace" out of headers	Nathan Binkert
	In addition to obvious changes, this required a slight change to the slicc grammar to allow types with :: in them. Otherwise slicc barfs on std::string which we need for the headers that slicc generates.
2010-01-29	ruby: Removed static members in RubyPort including hitcallback	Brad Beckmann
	Removed static members in RubyPort and removed the ruby request unique id.
2009-08-04	slicc: added MOESI_CMP_directory, DMA SequencerMsg, parameterized controllers	Derek Hower
	This changeset contains a lot of different changes that are too mingled to separate. They are: 1. Added MOESI_CMP_directory I made the changes necessary to bring back MOESI_CMP_directory, including adding a DMA controller. I got rid of MOESI_CMP_directory_m and made MOESI_CMP_directory use a memory controller. Added a new configuration for two level protocols in general, and MOESI_CMP_directory in particular. 2. DMA Sequencer uses a generic SequencerMsg I will eventually make the cache Sequencer use this type as well. It doesn't contain an offset field, just a physical address and a length. MI_example has been updated to deal with this. 3. Parameterized Controllers SLICC controllers can now take custom parameters to use for mapping, latencies, etc. Currently, only int parameters are supported.
2009-07-06	ruby: Import the latest ruby changes from gems.	Nathan Binkert
	This was done with an automated process, so there could be things that were done in this tree in the past that didn't make it. One known regression is that atomic memory operations do not seem to work properly anymore.
2009-05-11	ruby: Remove transactional access types (e.g. LD_XACT) from CacheRequestType	Polina Dudnik
	1. Modified enumeration 2. Also modified profiler 3. Remove transactions from Tester 4. Edited XACT_MEM out of Synthetic Driver
2009-05-11	ruby: Cleaned up sequencer. Removed LogTM specific code.	Derek Hower

2009-05-11	ruby: Import ruby and slicc from GEMS	Nathan Binkert
	We eventually plan to replace the m5 cache hierarchy with the GEMS hierarchy, but for now we will make both live alongside eachother.