gem5 - gem5

Age	Commit message (Expand)	Author
2017-04-05	ruby: Fix MOESI_CMP_directory for new DMA status changes.	Javier Cano-Cano
2016-11-19	ruby: init MessageSizeType of SequencerMsg to Request_Control	Sooraj Puthoor
2016-10-26	ruby: Allow multiple outstanding DMA requests	Michael LeBeane
2016-10-06	ruby: rename ALPHA_Network_test protocol to Garnet_standalone.	Tushar Krishna
2016-04-26	ruby: Rename pkt to m_pkt so it may be accessed via SLICC	Matthew Poremba
2016-01-22	ruby: removed Write_Only AccessPermission	Brad Beckmann
2016-01-19	gpu-compute: AMD's baseline GPU model	Tony Gutierrez
2016-01-19	mem: write combining for ruby protocols	Tony Gutierrez
2016-01-19	* * *	Tony Gutierrez
2015-07-20	mem: misc flags for AMD gpu model	Blake Hechtman
2015-07-20	ruby: slicc: have a static MachineType	Tony Gutierrez
2015-07-20	ruby: slicc: remove support for single machine, multiple types	Tony Gutierrez
2015-11-13	slicc: fixes for the Address to Addr changeset (11025)	Tony Gutierrez
2015-11-13	ruby: add BoolVec	Joe Gross
2015-09-23	ruby: bloom filters: refactor code	Nilay Vaish
2015-09-18	ruby: print addresses in hex	Nilay Vaish
2015-09-16	ruby: Add missing block deallocations in MOESI_hammer	Lena Olson
2015-09-16	ruby: message buffer, timer table: significant changes	Nilay Vaish
2015-09-16	slicc: export uint64_t instead of uint64	Anthony Gutierrez
2015-09-05	ruby: call setMRU from L1 controllers, not from sequencer	Nilay Vaish
2015-09-05	ruby: declare all protocol message buffers as parameters	Nilay Vaish
2015-08-19	ruby: reverts to changeset: bf82f1f7b040	Nilay Vaish
2015-08-14	ruby: add accessor functions to SLICC def of MachineID	Nilay Vaish
2015-08-14	ruby: call setMRU from L1 controllers, not from sequencer	Nilay Vaish
2015-08-14	ruby: drop the [] notation for lookup function.	Nilay Vaish
2015-08-14	ruby: replace Address by Addr	Nilay Vaish
2015-08-14	ruby: rename variables Addr to addr	Nilay Vaish
2015-08-14	ruby: Protocol changes for SimObject MessageBuffers	Joel Hestness
2015-08-14	ruby: Expose MessageBuffers as SimObjects	Joel Hestness
2015-08-14	ruby: Change PerfectCacheMemory::lookup to return pointer	Joel Hestness
2015-08-03	ruby: mesi three level: multiple corrections to the protocol	Nilay Vaish
2015-08-03	ruby: mesi two,three level: copy data only when dirty	Nilay Vaish
2015-07-20	slicc: enable overloading in functions not in classes	Brad Beckmann
2015-07-20	ruby: adds size and empty apis to the msg buffer stallmap	David Hashe
2015-07-20	ruby: fix deadlock bug in banked array resource checks	David Hashe
2015-07-20	mem: add request types for acquire and release	David Hashe
2015-07-20	ruby: allocate a block in CacheMemory without updating LRU state	David Hashe
2015-07-20	ruby: speed up function used for cache walks	David Hashe
2015-07-20	ruby: give access to cache tag/data latencies from SLICC	David Hashe
2015-07-20	slicc: support for multiple message types on the same buffer	David Hashe
2015-07-20	ruby: re-added the addressToInt slicc interface function	Brad Beckmann
2015-07-04	ruby: drop NetworkMessage class	Nilay Vaish
2015-07-04	ruby: mesi three level: name change to avoid clash	Nilay Vaish
2015-06-07	ruby: Fix MESI consistency bug	Marco Elver
2014-11-06	ruby: interface with classic memory controller	Nilay Vaish
2014-11-06	ruby: coherence protocols: remove data block from dirctory entry	Nilay Vaish
2014-11-06	ruby: single physical memory in fs mode	Nilay Vaish
2014-10-11	ruby: mesi: slight renaming	Nilay Vaish
2014-09-01	ruby: message buffers: significant changes	Nilay Vaish
2014-09-01	ruby: slicc: change the way configurable members are specified	Nilay Vaish