| Age | Commit message (Expand) | Author |
|---|
| 2019-05-14 | mem-ruby: Hit latencies defined by the controllers | Tiago Muck |
| 2019-04-28 | mem: Minimize the use of MemObject. | Gabe Black |
| 2019-03-19 | arch, cpu, dev, gpu, mem, sim, python: start using getPort. | Gabe Black |
| 2019-02-12 | python: Don't assume SimObjects live in the global namespace | Andreas Sandberg |
| 2019-01-17 | mem: Determine if a packet queue forces ordering at construction | Nikos Nikoleris |
| 2018-11-07 | mem-ruby: Use Packet writing functions instead of memcpy | Daniel R. Carvalho |
| 2018-07-23 | mem: Rename Packet::checkFunctional to trySatisfyFunctional | Robert Kovacsics |
| 2018-06-11 | misc: Using smart pointers for memory Requests | Giacomo Travaglini |
| 2018-04-27 | sim,cpu,mem,arch: Introduced MasterInfo data structure | Giacomo Travaglini |
| 2018-02-06 | mem: Standardize mem folder header guards | Daniel R. Carvalho |
| 2017-12-15 | mem-ruby: Support atomic_noncaching acceses in ruby | Swapnil Haria |
| 2017-12-04 | misc: Rename misc.(hh|cc) to logging.(hh|cc) | Gabe Black |
| 2017-06-13 | ruby: Add support for address ranges in the directory | Nikos Nikoleris |
| 2016-11-09 | style: [patch 1/22] use /r/3648/ to reorganize includes | Brandon Potter |
| 2016-09-29 | ruby: correct size for partial memory writes | Brad Beckmann |
| 2016-06-06 | stats: Fixing regStats function for some SimObjects | David Guillen Fandos |
| 2016-04-26 | ruby: Rename pkt to m_pkt so it may be accessed via SLICC | Matthew Poremba |
| 2016-04-15 | ruby: Fix block_on behavior | Joel Hestness |
| 2016-04-07 | Revert to 74c1e6513bd0 (sim: Thermal support for Linux) | Andreas Sandberg |
| 2014-11-18 | power: Add power states to ClockedObject | Akash Bagdia |
| 2016-02-06 | style: fix missing spaces in control statements | Steve Reinhardt |
| 2015-07-20 | ruby: split CPU and GPU latency stats | David Hashe |
| 2016-01-19 | gpu-compute: AMD's baseline GPU model | Tony Gutierrez |
| 2016-01-19 | mem: write combining for ruby protocols | Tony Gutierrez |
| 2015-07-20 | mem: misc flags for AMD gpu model | Blake Hechtman |
| 2016-01-11 | scons: Enable -Wextra by default | Andreas Hansson |
| 2015-11-13 | slicc: fixes for the Address to Addr changeset (11025) | Tony Gutierrez |
| 2015-11-13 | ruby: add BoolVec | Joe Gross |
| 2015-09-29 | ruby: Fix memory leak in AbstractController | Joel Hestness |
| 2015-09-23 | ruby: abstract controller: mark some variables as const | Nilay Vaish |
| 2015-09-18 | ruby: print addresses in hex | Nilay Vaish |
| 2015-09-16 | ruby: message buffer, timer table: significant changes | Nilay Vaish |
| 2015-09-16 | ruby: rename System.{hh,cc} to RubySystem.{hh,cc} | David Hashe |
| 2015-09-05 | ruby: adds set and way indices to AbstractCacheEntry | Nilay Vaish |
| 2015-08-27 | ruby: handle llsc accesses through CacheEntry, not CacheMemory | Nilay Vaish |
| 2015-08-19 | ruby: reverts to changeset: bf82f1f7b040 | Nilay Vaish |
| 2015-08-14 | ruby: abstract controller: mark some variables as const | Nilay Vaish |
| 2015-08-14 | ruby: adds set and way indices to AbstractCacheEntry | Nilay Vaish |
| 2015-08-14 | ruby: handle llsc accesses through CacheEntry, not CacheMemory | Nilay Vaish |
| 2015-08-14 | ruby: replace Address by Addr | Nilay Vaish |
| 2015-08-14 | ruby: rename variables Addr to addr | Nilay Vaish |
| 2015-08-14 | ruby: Expose MessageBuffers as SimObjects | Joel Hestness |
| 2015-08-07 | base: Declare a type for context IDs | Andreas Sandberg |
| 2015-08-01 | ruby: removed invalid assert in message comparitor | Brad Beckmann |
| 2015-07-20 | ruby: improved stall and wait debugging | Brad Beckmann |
| 2015-07-20 | ruby: Fix for stallAndWait bug | David Hashe |
| 2015-07-20 | slicc: support for multiple message types on the same buffer | David Hashe |
| 2015-07-20 | ruby: re-added the addressToInt slicc interface function | Brad Beckmann |
| 2015-07-04 | ruby: drop NetworkMessage class | Nilay Vaish |
| 2015-07-04 | ruby: remove message buffer node | Nilay Vaish |
