gem5 - gem5

Age	Commit message (Expand)	Author
2017-06-13	ruby: Add support for address ranges in the directory	Nikos Nikoleris
2017-03-09	ruby: fix MOESI_hammer directory to work with > 3GB memory	Lena Olson
2016-11-09	style: [patch 3/22] reduce include dependencies in some headers	Brandon Potter
2016-11-09	style: [patch 1/22] use /r/3648/ to reorganize includes	Brandon Potter
2016-12-05	ruby: Remove RubyMemoryControl and associated files	Andreas Hansson
2016-06-06	stats: Fixing regStats function for some SimObjects	David Guillen Fandos
2016-04-07	Revert to 74c1e6513bd0 (sim: Thermal support for Linux)	Andreas Sandberg
2014-11-18	power: Add power states to ClockedObject	Akash Bagdia
2016-02-06	style: fix missing spaces in control statements	Steve Reinhardt
2016-01-19	gpu-compute: AMD's baseline GPU model	Tony Gutierrez
2016-01-11	scons: Enable -Wextra by default	Andreas Hansson
2015-10-12	misc: Add explicit overrides and fix other clang >= 3.5 issues	Andreas Hansson
2015-10-12	misc: Remove redundant compiler-specific defines	Andreas Hansson
2015-09-29	ruby: Fix CacheMemory allocate leak	Joel Hestness
2015-09-29	ruby: RubyMemoryControl delete requests	Joel Hestness
2015-09-18	ruby: print addresses in hex	Nilay Vaish
2015-09-17	ruby: update WireBuffer API to match that of MessageBuffer	Tony Gutierrez
2015-09-16	ruby: message buffer, timer table: significant changes	Nilay Vaish
2015-09-16	ruby: rename System.{hh,cc} to RubySystem.{hh,cc}	David Hashe
2015-09-05	ruby: call setMRU from L1 controllers, not from sequencer	Nilay Vaish
2015-09-05	ruby: adds set and way indices to AbstractCacheEntry	Nilay Vaish
2015-09-01	ruby: directory memory: drop unused variable.	Nilay Vaish
2015-08-29	ruby: eliminate type uint64 and int64	Nilay Vaish
2015-08-27	ruby: handle llsc accesses through CacheEntry, not CacheMemory	Nilay Vaish
2015-08-21	ruby: Move Rubys cache class from Cache.py to RubyCache.py	Andreas Hansson
2015-08-19	ruby: reverts to changeset: bf82f1f7b040	Nilay Vaish
2015-08-14	ruby: directory memory: drop unused variable.	Nilay Vaish
2015-08-14	ruby: cache memory: drop {try,test}CacheAccess functions	Nilay Vaish
2015-08-14	ruby: call setMRU from L1 controllers, not from sequencer	Nilay Vaish
2015-08-14	ruby: adds set and way indices to AbstractCacheEntry	Nilay Vaish
2015-08-14	ruby: eliminate type uint64 and int64	Nilay Vaish
2015-08-14	ruby: slicc: use default argument value	Nilay Vaish
2015-08-14	ruby: handle llsc accesses through CacheEntry, not CacheMemory	Nilay Vaish
2015-08-14	ruby: replace Address by Addr	Nilay Vaish
2015-08-14	ruby: Change PerfectCacheMemory::lookup to return pointer	Joel Hestness
2015-08-14	ruby: Remove the RubyCache/CacheMemory latency	Joel Hestness
2015-07-20	ruby: expose access permission to replacement policies	David Hashe
2015-07-20	ruby: fix deadlock bug in banked array resource checks	David Hashe
2015-07-20	ruby: allocate a block in CacheMemory without updating LRU state	David Hashe
2015-07-20	ruby: speed up function used for cache walks	David Hashe
2015-07-20	ruby: initialize replacement policies with their own simobjs	David Hashe
2015-07-20	ruby: give access to cache tag/data latencies from SLICC	David Hashe
2015-07-10	ruby: replace global g_abs_controls with per-RubySystem var	Brandon Potter
2015-07-10	ruby: replace global g_system_ptr with per-object pointers	Brandon Potter
2015-07-10	ruby: remove extra whitespace and correct misspelled words	Brandon Potter
2015-07-07	sim: Refactor and simplify the drain API	Andreas Sandberg
2015-07-04	ruby: drop NetworkMessage class	Nilay Vaish
2015-07-04	ruby: remove message buffer node	Nilay Vaish
2015-05-26	ruby: Deprecation warning for RubyMemoryControl	Andreas Hansson
2015-03-02	mem: Split port retry for all different packet classes	Andreas Hansson