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path: root/src/mem/ruby
AgeCommit message (Expand)Author
2015-08-14ruby: DataBlock: adds a commentNilay Vaish
2015-08-14ruby: remove random seedNilay Vaish
2015-08-14ruby: SubBlock: refactor codeNilay Vaish
2015-08-14ruby: cache recorder: move check on block size to RubySystem.Nilay Vaish
2015-08-14ruby: abstract controller: mark some variables as constNilay Vaish
2015-08-14ruby: simple network: store Switch* in PerfectSwitch and ThrottleNilay Vaish
2015-08-14ruby: remove unused functionalRead() function.Nilay Vaish
2015-08-14ruby: perfect switch: refactor codeNilay Vaish
2015-08-14ruby: cache memory: drop {try,test}CacheAccess functionsNilay Vaish
2015-08-14ruby: call setMRU from L1 controllers, not from sequencerNilay Vaish
2015-08-14ruby: adds set and way indices to AbstractCacheEntryNilay Vaish
2015-08-14ruby: eliminate type uint64 and int64Nilay Vaish
2015-08-14ruby: slicc: use default argument valueNilay Vaish
2015-08-14ruby: handle llsc accesses through CacheEntry, not CacheMemoryNilay Vaish
2015-08-14ruby: replace Address by AddrNilay Vaish
2015-08-14ruby: rename variables Addr to addrNilay Vaish
2015-08-14ruby: Expose MessageBuffers as SimObjectsJoel Hestness
2015-08-14ruby: Change PerfectCacheMemory::lookup to return pointerJoel Hestness
2015-08-14ruby: Remove the RubyCache/CacheMemory latencyJoel Hestness
2015-08-07base: Declare a type for context IDsAndreas Sandberg
2015-08-03uby: Fix checkpointing and restoreTimothy Jones
2015-08-01ruby: removed invalid assert in message comparitorBrad Beckmann
2015-07-20ruby: improved stall and wait debuggingBrad Beckmann
2015-07-20ruby: change router pipeline stages to 2David Hashe
2015-07-20ruby: change advance_stage for flit_dDavid Hashe
2015-07-20ruby: expose access permission to replacement policiesDavid Hashe
2015-07-20ruby: adds size and empty apis to the msg buffer stallmapDavid Hashe
2015-07-20ruby: fix deadlock bug in banked array resource checksDavid Hashe
2015-07-20ruby: Fix for stallAndWait bugDavid Hashe
2015-07-20ruby: allocate a block in CacheMemory without updating LRU stateDavid Hashe
2015-07-20ruby: speed up function used for cache walksDavid Hashe
2015-07-20ruby: initialize replacement policies with their own simobjsDavid Hashe
2015-07-20ruby: give access to cache tag/data latencies from SLICCDavid Hashe
2015-07-20slicc: support for multiple message types on the same bufferDavid Hashe
2015-07-20mem: Hit callback delay fixDavid Hashe
2015-07-20ruby: re-added the addressToInt slicc interface functionBrad Beckmann
2015-07-20ruby: add useful dprints to sequencerBrad Beckmann
2015-07-24ruby: dma sequencer: removes redundant codeBrandon Potter
2015-07-22ruby: network: NetworkLink inherits from Consumer now.Nilay Vaish
2015-07-10ruby: replace global g_abs_controls with per-RubySystem varBrandon Potter
2015-07-10ruby: replace global g_system_ptr with per-object pointersBrandon Potter
2015-07-10ruby: replace g_ruby_start with per-RubySystem m_start_cycleBrandon Potter
2015-07-10ruby: remove extra whitespace and correct misspelled wordsBrandon Potter
2015-07-07sim: Refactor and simplify the drain APIAndreas Sandberg
2015-07-07sim: Decouple draining from the SimObject hierarchyAndreas Sandberg
2015-07-07sim: Make the drain state a global typed enumAndreas Sandberg
2015-07-07sim: Refactor the serialization base classAndreas Sandberg
2015-07-04ruby: drop NetworkMessage classNilay Vaish
2015-07-04ruby: remove message buffer nodeNilay Vaish
2015-07-03mem: Split WriteInvalidateReq into write and invalidateAndreas Hansson
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