| Age | Commit message (Expand) | Author |
|---|
| 2012-09-14 | scons: Use c++0x with gcc >= 4.4 instead of 4.6 | Andreas Hansson |
| 2012-09-11 | clang: Fix issues identified by the clang static analyzer | Andreas Hansson |
| 2012-09-11 | Ruby: Use uint32_t instead of uint32 everywhere | Nilay Vaish |
| 2012-09-11 | Ruby: Use uint8_t instead of uint8 everywhere | Nilay Vaish |
| 2012-09-10 | Ruby System: Convert to Clocked Object | Nilay Vaish |
| 2012-09-07 | Param: Transition to Cycles for relevant parameters | Andreas Hansson |
| 2012-09-05 | Ruby Memory Controller: Fix clocking | Joel Hestness |
| 2012-08-28 | Ruby: Correct DataBlock =operator | Jason Power |
| 2012-08-27 | Ruby: remove README.debugging and Decommissioning_note | Nilay Vaish |
| 2012-08-27 | Ruby: Remove RubyEventQueue | Nilay Vaish |
| 2012-08-27 | Ruby Memory Vector: Allow more than 4GB of memory | Nilay Vaish |
| 2012-08-22 | Port: Extend the QueuedPort interface and use where appropriate | Andreas Hansson |
| 2012-08-19 | Ruby Banked Array: add copyrights | Nilay Vaish |
| 2012-08-16 | Ruby: Add RubySystem parameter to MemoryControl | Jason Power |
| 2012-08-15 | O3,ARM: fix some problems with drain/switchout functionality and add Drain DP... | Anthony Gutierrez |
| 2012-08-10 | Ruby: Clean up topology changes | Jason Power |
| 2012-08-01 | Ruby NetDest: add assert for bad element in netdest | Jason Power |
| 2012-07-12 | Ruby: remove config information from ruby.stats | Nilay Vaish |
| 2012-07-12 | Ruby: remove some unused stuff from SLICC files | Nilay Vaish |
| 2012-07-11 | ruby: improved DRAM reset comment | Brad Beckmann |
| 2012-07-10 | # User Brad Beckmann <Brad.Beckmann@amd.com> | Brad Beckmann |
| 2012-07-10 | # User Brad Beckmann <Brad.Beckmann@amd.com> | Brad Beckmann |
| 2012-07-10 | ruby: banked cache array resource model | Brad Beckmann |
| 2012-07-10 | ruby: tag and data cache access support | Joel Hestness |
| 2012-07-10 | ruby: adds reset function to Ruby memory controllers | Nuwan Jayasena |
| 2012-07-10 | ruby: memory controllers now inherit from an abstract "MemoryControl" class | Nuwan Jayasena |
| 2012-07-10 | ruby: changes how Topologies are created | Brad Beckmann |
| 2012-07-09 | Port: Make getAddrRanges const | Andreas Hansson |
| 2012-07-09 | Port: Add isSnooping to slave port (asking master port) | Andreas Hansson |
| 2012-05-22 | Ruby: Remove the unused src/mem/ruby/common/Driver.* files. | Nilay Vaish |
| 2012-05-22 | Ruby Sequencer: Schedule deadlock check event at correct time | Nilay Vaish |
| 2012-05-04 | Ruby: Ensure snoop requests are sent using sendTimingSnoopReq | Andreas Hansson |
| 2012-05-01 | MEM: Separate requests and responses for timing accesses | Andreas Hansson |
| 2012-04-28 | Garnet: Correct computation of link utilization | Nilay Vaish |
| 2012-04-25 | Ruby: Remove extra statements from Sequencer | Nilay Vaish |
| 2012-04-14 | MEM: Remove the Broadcast destination from the packet | Andreas Hansson |
| 2012-04-14 | MEM: Separate snoops and normal memory requests/responses | Andreas Hansson |
| 2012-04-14 | clang/gcc: Fix compilation issues with clang 3.0 and gcc 4.6 | Andreas Hansson |
| 2012-04-12 | Ruby: Ensure order-dependent iteration uses an ordered map | Andreas Hansson |
| 2012-04-06 | sim-ruby: checkpointing fixes and dependent eventq improvements | Brad Beckmann |
| 2012-04-06 | rubytest: seperated read and write ports. | Brad Beckmann |
| 2012-04-06 | MEM: Enable multiple distributed generalized memories | Andreas Hansson |
| 2012-03-30 | Ruby: Remove the physMemPort and instead access memory directly | Andreas Hansson |
| 2012-03-30 | MEM: Introduce the master/slave port sub-classes in C++ | William Wang |
| 2012-03-23 | Ruby: Fix Set::print for 32-bit hosts | Andreas Hansson |
| 2012-03-22 | MEM: Split SimpleTimingPort into PacketQueue and ports | Andreas Hansson |
| 2012-03-22 | Scons: Remove Werror=False in SConscript files | Andreas Hansson |
| 2012-03-19 | Garnet: Stats at vnet granularity + code cleanup | Tushar Krishna |
| 2012-03-02 | Ruby: Rename RubyPort::sendTiming to avoid overriding base class | Andreas Hansson |
| 2012-02-24 | MEM: Move port creation to the memory object(s) construction | Andreas Hansson |
