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path: root/src/mem/slicc/symbols
AgeCommit message (Collapse)Author
2009-09-25slicc: removed unused atomics code from StateMachineDerek Hower
2009-09-17Functionality migrated to sequencer.Polina Dudnik
2009-08-28Reset the atomics flags if RMW_Read is not followed by a RMW_Read or RMW_WritePolina Dudnik
2009-08-15Made servicing_atomic a counter and added started writes:Polina Dudnik
a function for setting the flag to indicate that the rmw_writes started issuing
2009-08-14Bug fix: indicate when writes started coming inPolina Dudnik
2009-08-14Added proc_id to CacheMsg for SMT.Polina Dudnik
Not yet necessary, but in case each of the threads is allowed to initiate an atomic, will come in handy
2009-08-14Multi-line RMW handlingPolina Dudnik
2009-08-04slicc: added MOESI_CMP_directory, DMA SequencerMsg, parameterized controllersDerek Hower
This changeset contains a lot of different changes that are too mingled to separate. They are: 1. Added MOESI_CMP_directory I made the changes necessary to bring back MOESI_CMP_directory, including adding a DMA controller. I got rid of MOESI_CMP_directory_m and made MOESI_CMP_directory use a memory controller. Added a new configuration for two level protocols in general, and MOESI_CMP_directory in particular. 2. DMA Sequencer uses a generic SequencerMsg I will eventually make the cache Sequencer use this type as well. It doesn't contain an offset field, just a physical address and a length. MI_example has been updated to deal with this. 3. Parameterized Controllers SLICC controllers can now take custom parameters to use for mapping, latencies, etc. Currently, only int parameters are supported.
2009-07-22Fixed the licences plus minor fixes for compilationPolina Dudnik
2009-07-18ruby: removed all refs to old RubyConfigDerek Hower
2009-07-18mergeDerek Hower
2009-07-18slicc: made coherence profilers per-controllerDerek Hower
2009-07-13Changed the state machine to generate code such that multiple processors can ↵Polina Dudnik
make atomic requests at once
2009-07-13Added atomics implementation which would work for MI_examplePolina Dudnik
2009-07-06ruby: Import the latest ruby changes from gems.Nathan Binkert
This was done with an automated process, so there could be things that were done in this tree in the past that didn't make it. One known regression is that atomic memory operations do not seem to work properly anymore.
2009-07-06ruby: replace strings that were missed in original ruby import.Nathan Binkert
2009-05-12ruby: remove random uint typedef and use unsignedNathan Binkert
2009-05-11ruby: Make ruby #includes use full paths to the files they're including.Nathan Binkert
This basically means changing all #include statements and changing autogenerated code so that it generates the correct paths. Because slicc generates #includes, I had to hard code the include paths to mem/protocol.
2009-05-11ruby: Import ruby and slicc from GEMSNathan Binkert
We eventually plan to replace the m5 cache hierarchy with the GEMS hierarchy, but for now we will make both live alongside eachother.