Age | Commit message (Collapse) | Author | |
---|---|---|---|
2009-08-06 | fixed MOESI_CMP_directory bug | Derek Hower | |
2009-08-06 | protocol: fixed MOESI_CMP_directory bug | Derek Hower | |
2009-08-06 | ruby: better configuration assert message | Derek Hower | |
2009-08-05 | merge | Derek Hower | |
2009-08-05 | ruby: configuration supports multiple runs in same session | Derek Hower | |
These changes allow to run Ruby-gems multiple times from the same ruby-lang script with different configurations | |||
2009-08-05 | protocol: made MI_example dma mapping generic | Derek Hower | |
2009-08-04 | ruby: made mapAddressToRange based off a bit count | Derek Hower | |
2009-08-04 | slicc: added MOESI_CMP_directory, DMA SequencerMsg, parameterized controllers | Derek Hower | |
This changeset contains a lot of different changes that are too mingled to separate. They are: 1. Added MOESI_CMP_directory I made the changes necessary to bring back MOESI_CMP_directory, including adding a DMA controller. I got rid of MOESI_CMP_directory_m and made MOESI_CMP_directory use a memory controller. Added a new configuration for two level protocols in general, and MOESI_CMP_directory in particular. 2. DMA Sequencer uses a generic SequencerMsg I will eventually make the cache Sequencer use this type as well. It doesn't contain an offset field, just a physical address and a length. MI_example has been updated to deal with this. 3. Parameterized Controllers SLICC controllers can now take custom parameters to use for mapping, latencies, etc. Currently, only int parameters are supported. | |||
2009-08-04 | slicc: generate html by default | Derek Hower | |
2009-08-04 | slicc: better error messages when the python parser fails | Nathan Binkert | |
2009-08-03 | Automated merge with ssh://hg@m5sim.org/m5 | Derek Hower | |
2009-08-01 | Fix setting of INST_FETCH flag for O3 CPU. | Steve Reinhardt | |
It's still broken in inorder. Also enhance DPRINTFs in cache and physical memory so we can see more easily whether it's getting set or not. | |||
2009-08-01 | Clean up some inconsistencies with Request flags. | Steve Reinhardt | |
2009-08-01 | Rename internal Request fields to start with '_'. | Steve Reinhardt | |
The inconsistency was causing a subtle bug with some of the constructors where the params had the same name as the fields. This is also a first step to switching the accessors over to our new "standard", e.g., getVaddr() -> vaddr(). | |||
2009-07-29 | ruby: fixed clearStats | Derek Hower | |
2009-07-27 | ruby: removed unused/incorrect profiler state | Derek Hower | |
2009-07-22 | Fixed the licences plus minor fixes for compilation | Polina Dudnik | |
2009-07-21 | ruby: fixed sequencer RMW data bug | Derek Hower | |
2009-07-21 | ruby: libruby_init now takes parsed Ruby-lang config text | Derek Hower | |
libruby_init now expects to get a file that contains the output of running a ruby-lang configuration, opposed to the ruby-lang configuration itself. | |||
2009-07-20 | ruby: moved cache stats from Profiler to CacheMemory | Derek Hower | |
Caches are now responsible for their own statistic gathering. This requires a direct callback from the protocol on misses, and so all future protocols need to take this into account. | |||
2009-07-19 | scons: removed RubyConfig from scons | Derek Hower | |
2009-07-18 | ruby: removed all refs to old RubyConfig | Derek Hower | |
2009-07-18 | ruby: removed dead files | Derek Hower | |
2009-07-18 | ruby: removed dead files | Derek Hower | |
2009-07-18 | merge | Derek Hower | |
2009-07-18 | ruby: fixed dma sequencer bug | Derek Hower | |
The DMASequencer was still using a parameter from the old RubyConfig, causing an offset error when the requested data wasn't block aligned. This changeset also includes a fix to MI_example for a similar bug. | |||
2009-07-18 | ruby: better debug print for DataBlock | Derek Hower | |
2009-07-18 | slicc: made coherence profilers per-controller | Derek Hower | |
2009-07-16 | merge | Polina Dudnik | |
2009-07-15 | Tester update | Polina Dudnik | |
2009-07-13 | Changed the state machine to generate code such that multiple processors can ↵ | Polina Dudnik | |
make atomic requests at once | |||
2009-07-13 | 1. Got rid of unused functions in DirectoryMemory | Polina Dudnik | |
2. Reintroduced RMW_Read and RMW_Write 3. Defined -2 in the Sequencer as well as made a note about mandatory queue Did not address the issues in the slicc because remaking the atomics altogether to allow multiple processors to issue atomic requests at once | |||
2009-07-13 | merge | Derek Hower | |
2009-07-13 | regression: updated memtest-ruby stats | Derek Hower | |
This also includes a change to the default Ruby random seed, which was previously set using the wall clock. It is now set to 1234 so that the stat files don't change for the regression tester. | |||
2009-07-13 | Changes to add tracing and replaying command-line options | Polina Dudnik | |
Trace is automatically ended upon a manual checkpoint | |||
2009-07-13 | Locked requests should actually be converted to ST rather than ATOMIC, ↵ | Polina Dudnik | |
because ATOMIC is for RMW. | |||
2009-07-13 | Added atomics implementation which would work for MI_example | Polina Dudnik | |
2009-07-13 | Minor fixes for compiling | Polina Dudnik | |
2009-07-13 | Replaced RMW with Locked. RMW will be used for the coherence-aided atomics ↵ | Polina Dudnik | |
other than LLSC | |||
2009-07-13 | Moved the lock check and clearing the lock into makeRequest | Polina Dudnik | |
2009-07-13 | Forgot to replace one of the RubyRequest_RMW | Polina Dudnik | |
2009-07-13 | Reintegrated Derek's functional implementation of atomics with a minor ↵ | Polina Dudnik | |
change: don't clear lock on failure | |||
2009-07-08 | Registers: Add a registers.hh file as an ISA switched header. | Gabe Black | |
This file is for register indices, Num* constants, and register types. copyRegs and copyMiscRegs were moved to utility.hh and utility.cc. --HG-- rename : src/arch/alpha/regfile.hh => src/arch/alpha/registers.hh rename : src/arch/arm/regfile.hh => src/arch/arm/registers.hh rename : src/arch/mips/regfile.hh => src/arch/mips/registers.hh rename : src/arch/sparc/regfile.hh => src/arch/sparc/registers.hh rename : src/arch/x86/regfile.hh => src/arch/x86/registers.hh | |||
2009-07-08 | slicc: fixed MI_example bug. The directory wasn't deallocating the TBE, ↵ | Derek Hower | |
leading to a leak. Also increased the default max TBE size to 256 to allow memtest to pass the regression. | |||
2009-07-08 | ruby: set the default values of the debug object so that nothing is printed | Derek Hower | |
2009-07-08 | slicc: Fixed MI_example bug. The directory was not writing data to DRAM ↵ | Derek Hower | |
after a PUTX. | |||
2009-07-07 | removed stray debug print | Derek Hower | |
2009-07-06 | ruby: Fix RubyMemory to work with the newer ruby. | Nathan Binkert | |
2009-07-06 | ruby: apply some fixes that were overwritten by the recent ruby import. | Nathan Binkert | |
2009-07-06 | slicc: update parser.py for changes in slicc language. | Nathan Binkert | |