| Age | Commit message (Expand) | Author |
|---|
| 2012-03-23 | Ruby: Fix Set::print for 32-bit hosts | Andreas Hansson |
| 2012-03-22 | MEM: Unify bus access methods and prepare for master/slave split | Andreas Hansson |
| 2012-03-22 | MEM: Split SimpleTimingPort into PacketQueue and ports | Andreas Hansson |
| 2012-03-22 | Scons: Remove Werror=False in SConscript files | Andreas Hansson |
| 2012-03-19 | Garnet: Stats at vnet granularity + code cleanup | Tushar Krishna |
| 2012-03-09 | cache: Allow main memory to be at disjoint address ranges. | Ali Saidi |
| 2012-03-06 | build scripts: Made minor modifications to reduce build overhead time. | Marc Orr |
| 2012-03-02 | Ruby: Rename RubyPort::sendTiming to avoid overriding base class | Andreas Hansson |
| 2012-03-01 | Cache: Fix an issue with LRU when bonus block is used to complete transaction. | Ali Saidi |
| 2012-02-29 | MEM: Make all the port proxy members const | Andreas Hansson |
| 2012-02-24 | MEM: Simplify cache ports preparing for master/slave split | Andreas Hansson |
| 2012-02-24 | MEM: Prepare mport for master/slave split | Andreas Hansson |
| 2012-02-24 | MEM: Move all read/write blob functions from Port to PortProxy | Andreas Hansson |
| 2012-02-24 | MEM: Make port proxies use references rather than pointers | Andreas Hansson |
| 2012-02-24 | MEM: Move port creation to the memory object(s) construction | Andreas Hansson |
| 2012-02-24 | CPU: Round-two unifying instr/data CPU ports across models | Andreas Hansson |
| 2012-02-24 | MEM: Fatal when no port can be found for an address | Andreas Hansson |
| 2012-02-13 | MEM: Introduce the master/slave port roles in the Python classes | Andreas Hansson |
| 2012-02-12 | mem: fix cache stats to use request ids correctly | Dam Sunwoo |
| 2012-02-12 | mem: Add a master ID to each request object. | Ali Saidi |
| 2012-02-12 | prefetcher: Make prefetcher a sim object instead of it being a parameter on c... | Mrinmoy Ghosh |
| 2012-02-10 | Ruby: Remove isTagPresent() calls from Sequencer.cc | Nilay Vaish |
| 2012-02-10 | MESI: Add queues for stalled requests | Nilay Vaish |
| 2012-02-09 | MEM: Remove onRetryList from BusPort and rely on retryList | Andreas Hansson |
| 2012-01-31 | Merge with head, hopefully the last time for this batch. | Gabe Black |
| 2012-01-31 | clang: Enable compiling gem5 using clang 2.9 and 3.0 | Koan-Sin Tan |
| 2012-01-31 | MEM: Remove the otherPort from the cache ports | Andreas Hansson |
| 2012-01-31 | CheckerCPU: Re-factor CheckerCPU to be compatible with current gem5 | Geoffrey Blake |
| 2012-01-30 | Merge with main repository. | Gabe Black |
| 2012-01-30 | MEM: Make the RubyPort physMemPort a PioPort instead of M5Port | Andreas Hansson |
| 2012-01-28 | Merge with the main repo. | Gabe Black |
| 2012-01-16 | Merge yet again with the main repository. | Gabe Black |
| 2012-01-12 | Fix memory corruption issue with CopyStringOut() | Mitchell Hayenga |
| 2012-01-25 | Mem: Add simple bandwidth stats to PhysicalMemory | Ali Saidi |
| 2012-01-23 | O3, Ruby: Forward invalidations from Ruby to O3 CPU | Nilay Vaish |
| 2012-01-23 | MemCmd: Add a command for invalidation requests to LSQ | Nilay Vaish |
| 2012-01-17 | MEM: Make the bus default port yet another port | Andreas Hansson |
| 2012-01-17 | MEM: Make the bus bridge unidirectional and fixed address range | Andreas Hansson |
| 2012-01-17 | MEM: Remove the functional ports from the memory system | William Wang |
| 2012-01-17 | MEM: Separate queries for snooping and address ranges | Andreas Hansson |
| 2012-01-17 | MEM: Remove Port removeConn and MemObject deletePortRefs | Andreas Hansson |
| 2012-01-17 | MEM: Remove the notion of the default port | Andreas Hansson |
| 2012-01-17 | MEM: Simplify ports by removing EventManager | Andreas Hansson |
| 2012-01-17 | MEM: Add port proxies instead of non-structural ports | Andreas Hansson |
| 2012-01-17 | Ruby: Change the access permissions for MOESI hammer | Andreas Hansson |
| 2012-01-17 | MEM: Differentiate functional cache accesses from CPU and memory | Andreas Hansson |
| 2012-01-12 | PerfectCacheMemory: Remove references to CacheMsg | Nilay Vaish |
| 2012-01-11 | Packet: Put back part of the assert | Ali Saidi |
| 2012-01-11 | Packet: Remove meaningless assert statement | Ali Saidi |
| 2012-01-11 | Ruby: Resurrect Cache Warmup Capability | Nilay Vaish |
