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mem
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Author
2006-10-19
Fixes to get single level uni-coherence to work.
Ron Dreslinski
2006-10-19
Merge zizzer:/bk/newmem
Ron Dreslinski
2006-10-19
Always get the functional access from the highest level of cache first.
Ron Dreslinski
2006-10-19
First cut at LL/SC support in caches (atomic mode only).
Steve Reinhardt
2006-10-18
need some initializations before doing the loop.
Lisa Hsu
2006-10-18
Fix WriteInvalidateResp
Ron Dreslinski
2006-10-18
Merge zizzer:/bk/newmem
Ron Dreslinski
2006-10-18
Break a lot of overly long lines.
Steve Reinhardt
2006-10-18
Get rid of doData() lines (were already commented out).
Steve Reinhardt
2006-10-18
Get rid of obsolete in-cache copy support.
Steve Reinhardt
2006-10-17
Include packet_impl.hh (need this on my laptop,
Steve Reinhardt
2006-10-17
add code to serialize se structures. Lisa is working on the python side of th...
Ali Saidi
2006-10-17
Fixes for uni-coherence in timing mode for FS.
Ron Dreslinski
2006-10-17
Fixes to cache eliminating the assumption that the Packet is still valid afte...
Ron Dreslinski
2006-10-17
Properly chack the pkt pointer on upgrades to insure no segfaults when writeb...
Ron Dreslinski
2006-10-17
Fix it so that the cache does not assume to gave the packet it sent out via s...
Ron Dreslinski
2006-10-17
Merge zizzer:/bk/newmem
Ron Dreslinski
2006-10-14
Get rid of unused CacheBlk << output operator.
Steve Reinhardt
2006-10-13
Merge zizzer:/bk/newmem
Ron Dreslinski
2006-10-13
Fix for DMA's in FS caches.
Ron Dreslinski
2006-10-12
replace functional code in tport with fixPacket().
Ali Saidi
2006-10-12
Fix CSHR retrys
Ron Dreslinski
2006-10-12
Merge zizzer:/bk/newmem
Ali Saidi
2006-10-12
small bus updates for functional accesses
Ali Saidi
2006-10-12
Merge zizzer:/bk/newmem
Ron Dreslinski
2006-10-12
Remove bus and top level parameters from cache
Ron Dreslinski
2006-10-12
Merge zizzer:/bk/newmem
Ali Saidi
2006-10-12
add a traceflag for functional accesses
Ali Saidi
2006-10-12
Check the response queue on functional accesses.
Ron Dreslinski
2006-10-12
Fix problems with unCacheable addresses in timing-coherence
Ron Dreslinski
2006-10-11
Make default ID unique (not broadcast)
Ron Dreslinski
2006-10-11
Forgot to mark myself as on the retry list
Ron Dreslinski
2006-10-11
Fix bus in FS mode.
Ron Dreslinski
2006-10-11
More cache fixes. Atomic coherence now works as well.
Ron Dreslinski
2006-10-11
Update for Atomic Coherece with Gabes bus
Ron Dreslinski
2006-10-11
Merge zizzer:/n/wexford/x/gblack/m5/newmem_bus
Ron Dreslinski
2006-10-11
Use bus response time paramteres
Ron Dreslinski
2006-10-11
Don't call recvRetry if the bus is busy anyway. This takes care of a corner c...
Gabe Black
2006-10-11
Merge zizzer:/n/wexford/x/gblack/m5/newmem_bus
Ron Dreslinski
2006-10-11
Make the bus work if the other sides recvRetry doesn't call sendTiming for so...
Gabe Black
2006-10-11
When turning asserts into if's don't forget to invert.
Ron Dreslinski
2006-10-11
Writebacks can be pulled out from under the BusRequest when snoops of uprgade...
Ron Dreslinski
2006-10-10
Only issue responses if we aren;t already blocked
Ron Dreslinski
2006-10-10
Merge zizzer:/n/wexford/x/gblack/m5/newmem_bus
Ron Dreslinski
2006-10-10
Make the bus is occupied for none broadcast packets as well.
Gabe Black
2006-10-10
Merge zizzer:/n/wexford/x/gblack/m5/newmem_bus
Ron Dreslinski
2006-10-10
Debugging info
Ron Dreslinski
2006-10-10
Put in an accounting mechanism and an assert to make sure something doesn't t...
Gabe Black
2006-10-10
Fixed a corner case and simplified the logic in Packet::intersect.
Gabe Black
2006-10-10
Merge zizzer:/n/wexford/x/gblack/m5/newmem_bus
Ron Dreslinski
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