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path: root/src/mem
AgeCommit message (Expand)Author
2014-05-09mem: Squash prefetch requests from downstream cachesMitch Hayenga
2014-05-09mem: Auto-generate CommMonitor trace file namesSascha Bischoff
2014-04-01mem: Don't print out the data of a cache blockMitch Hayenga
2014-04-19ruby: slicc: remove old documentationNilay Vaish
2014-04-19ruby: slicc: slight change to rule for transitionsNilay Vaish
2014-04-19ruby: recorder: Fix (de-)serializing with different cache block-sizesMarco Elver
2014-04-08ruby: slicc: change enqueue statementNilay Vaish
2014-04-08ruby: coherence protocols: drop the phrase IntraChipNilay Vaish
2014-03-23mem: Track DRAM read/write switching and add hysteresisAndreas Hansson
2014-03-23mem: Rename SimpleDRAM to a more suitable DRAMCtrlAndreas Hansson
2014-03-23mem: Change memory defaults to be more representativeAndreas Hansson
2014-03-23mem: Add close adaptive paging policy to DRAM controller modelWendy Elsasser
2014-03-23mem: DRAM controller tidying upAndreas Hansson
2014-03-23mem: Fix bug in DRAM bytes per activateAndreas Hansson
2014-03-23mem: Limit the accesses to a page before forcing a prechargeAndreas Hansson
2014-03-23mem: Make DRAM write queue draining more aggressiveAndreas Hansson
2014-03-23mem: DDR3 config for comparing with DRAMSim2Neha Agarwal
2014-03-23mem: More descriptive address-mapping scheme namesAndreas Hansson
2014-03-23ruby: Move Ruby debug flags to ruby dir and remove stale optionsAndreas Hansson
2014-03-23mem: Include the DRAMSim2 wrapper in NULL buildAndreas Hansson
2014-03-23mem: CommMonitor trace warn on non-timing modeSascha Bischoff
2014-03-20ruby: consumer: avoid accessing wakeup times when waking upNilay Vaish
2014-03-20ruby: garnet: convert network interfaces into clocked objectsNilay Vaish
2014-03-20ruby: slicc: code refactorNilay Vaish
2014-03-20ruby: no piobus in se modeNilay Vaish
2014-03-17ruby: remove some of the unnecessary codeNilay Vaish
2014-03-07mem: Fix incorrect assert failure in the CachePrakash Ramrakhyani
2014-03-07mem: Wakeup sleeping CPUs without caches on LLSCAli Saidi
2014-03-01ruby: message buffer: changes related to tracking push/pop timesNilay Vaish
2014-03-01ruby: make the max_size variable of the MessageBuffer unsignedNilay Vaish
2014-03-01ruby: profiler: statically allocate stats variableNilay Vaish
2014-02-23ruby: route all packets through ruby portNilay Vaish
2014-02-23ruby: Simplify RubyPort flow control and routingAndreas Hansson
2014-02-23ruby: message buffer: refactor codeNilay Vaish
2014-02-23ruby: remove few not required #includesNilay Vaish
2014-02-23ruby: slicc: remove unused COPY_HEAD functionalityNilay Vaish
2014-02-23ruby: protocols: remove unused action z_stallNilay Vaish
2014-02-21ruby: network: move message buffers to base network class.Nilay Vaish
2014-02-21ruby: network: garnet: fixed: removes net_ptr from linksNilay Vaish
2014-02-21ruby: cache: remove not required variable m_cache_nameNilay Vaish
2014-02-20ruby: network: garnet: fixed: removes next cycle functionsNilay Vaish
2014-02-20ruby: controller: slight code refactoringNilay Vaish
2014-02-20ruby: mesi three level: rename incorrectly named filesNilay Vaish
2014-02-20ruby: network: removes unused code.Nilay Vaish
2014-02-20ruby: slicc: slight code refactoringNilay Vaish
2014-02-20ruby: message buffer: removes some unecessary functions.Nilay Vaish
2014-02-18mem: Fix bug in PhysicalMemory use of mmap and munmapAndreas Hansson
2014-02-18mem: Filter cache snoops based on address rangesAndreas Hansson
2014-02-18mem: Add a wrapped DRAMSim2 memory controllerAndreas Hansson
2014-02-18mem: Fix input to DPRINTF in CommMonitorAndreas Hansson