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2009-05-11ruby: Import ruby and slicc from GEMSNathan Binkert
We eventually plan to replace the m5 cache hierarchy with the GEMS hierarchy, but for now we will make both live alongside eachother.
2009-04-23request: reorganize flags to group related flags together.Steve Reinhardt
2008-07-16mem: use single BadAddr responder per system.Steve Reinhardt
Previously there was one per bus, which caused some coherence problems when more than one decided to respond. Now there is just one on the main memory bus. The default bus responder on all other buses is now the downstream cache's cpu_side port. Caches no longer need to do address range filtering; instead, we just have a simple flag to prevent snoops from propagating to the I/O bus.
2009-04-21Minor tweaks for future Ruby compatibility.Steve Reinhardt
2009-04-21request: add PREFETCH flag.Steve Reinhardt
2009-04-20request: rename INST_READ to INST_FETCH.Steve Reinhardt
2009-04-20request: split public and private flags into separate fields.Steve Reinhardt
This frees up needed space for more public flags. Also: - remove unused Request accessor methods - make Packet use public Request accessors, so it need not be a friend
2009-04-19Mem: Fill out the comment that describes the LOCKED request flag.Gabe Black
2009-04-19Mem: Change isLlsc to isLLSC.Gabe Black
2009-04-19Memory: Add a LOCKED flag back in for x86 style locking.Gabe Black
2009-04-19Memory: Rename LOCKED for load locked store conditional to LLSC.Gabe Black
2009-04-19X86: Add a function which gets called when an interrupt message has been ↵Gabe Black
delivered.
2009-04-19X86: Fix the flags for interrupt response messages.Gabe Black
2009-03-11cache: set dirty bit on swaps (oops!)Steve Reinhardt
2009-03-10prefetch: don't panic on requests w/o contextID (e.g., writebacks).Steve Reinhardt
2009-03-05stats: Fix all stats usages to deal with template fixesNathan Binkert
2009-02-25CPU: Get rid of translate... functions from various interface classes.Gabe Black
2009-02-16sycalls: implement mremap() and add DATA flag for getrlimit(). mremap has ↵Lisa Hsu
been tested on Alpha, compiles for the rest but not tested. I don't see why it wouldn't work though.
2009-02-16Fixes to get prefetching working again.Steve Reinhardt
Apparently we broke it with the cache rewrite and never noticed. Thanks to Bao Yungang <baoyungang@gmail.com> for a significant part of these changes (and for inspiring me to work on the rest). Some other overdue cleanup on the prefetch code too.
2009-01-13SCons: centralize the Dir() workaround for newer versions of scons.Nathan Binkert
Scons bug id: 2006 M5 Bug id: 308
2008-12-06flags: Change naming of functions to be clearerNathan Binkert
2008-11-15syscalls: fix latent brk/obreak bug.Steve Reinhardt
Bogus calls to ChunkGenerator with negative size were triggering a new assertion that was added there. Also did a little renaming and cleanup in the process.
2008-11-14Cache: get rid of obsolete Tag methods.Steve Reinhardt
I think readData() and writeData() were used for Erik's compression work, but that code is gone, these aren't called anymore, and they don't even really do what their names imply.
2008-11-14Fix a bunch of bugs I introduced when I changed the flags stuff for packets.Nathan Binkert
I did some of the flags and assertions wrong. Thanks to Brad Beckmann for pointing this out. I should have run the opt regressions instead of the fast. I also screwed up some of the logical functions in the Flags class.
2008-11-13CPU: Refactor read/write in the simple timing CPU.Gabe Black
2008-11-10Clean up the SimpleTimingPort class a little bit.Nathan Binkert
Move the constructor into the .cc file and get rid of the typedef for SendEvent.
2008-11-10style: clean up the Packet stuffNathan Binkert
2008-11-10mem: Assert that requests have non-negative size.Steve Reinhardt
Would have saved me much debugging time if these had been in there previously.
2008-11-10Cache: Refactor packet forwarding a bit.Steve Reinhardt
Makes adding write-through operations easier.
2008-11-04decouple eviction from insertion in the cache.Lisa Hsu
2008-11-04Change the findBlock(addr, lat) to accessBlock, which I think has better ↵Lisa Hsu
connotations for what is really happening and how it should be used.
2008-11-04get rid of all instances of readTid() and getThreadNum(). Unify and eliminateLisa Hsu
redundancies with threadId() as their replacement.
2008-11-02Add in Context IDs to the simulator. From now on, cpuId is almost never used,Lisa Hsu
the primary identifier for a hardware context should be contextId(). The concept of threads within a CPU remains, in the form of threadId() because sometimes you need to know which context within a cpu to manipulate.
2008-10-23s/cpu_id/cpuId in o3 (to be consistent and match style), also fix some typos inLisa Hsu
comments.
2008-10-23probe function no longer used anywhere.Lisa Hsu
2008-10-23remove the totally obsolete split cacheLisa Hsu
2008-10-14This function declaration isn't used anywhere.Lisa Hsu
HG: user: Lisa Hsu <hsul@eecs.umich.edu> HG: branch default HG: changed src/mem/cache/cache.hh
2008-10-12Get rid of some commented out code.Gabe Black
2008-10-12Create a message port for sending messages as apposed to reading/writing a ↵Gabe Black
memory range.
2008-10-09mem: Add a method for setting the time on a packet.Nathan Binkert
2008-10-09eventq: convert all usage of events to use the new API.Nathan Binkert
For now, there is still a single global event queue, but this is necessary for making the steps towards a parallelized m5.
2008-10-09eventq: Major API change for the Event and EventQueue structures.Nathan Binkert
Since the early days of M5, an event needed to know which event queue it was on, and that data was required at the time of construction of the event object. In the future parallelized M5, this sort of requirement does not work well since the proper event queue will not always be known at the time of construction of an event. Now, events are created, and the EventQueue itself has the schedule function, e.g. eventq->schedule(event, when). To simplify the syntax, I created a class called EventManager which holds a pointer to an EventQueue and provides the schedule interface that is a proxy for the EventQueue. The intent is that objects that frequently schedule events can be derived from EventManager and then they have the schedule interface. SimObject and Port are examples of objects that will become EventManagers. The end result is that any SimObject can just call schedule(event, when) and it will just call that SimObject's eventq->schedule function. Of course, some objects may have more than one EventQueue, so this interface might not be perfect for those, but they should be relatively few.
2008-09-26When nesting if statements, use braces to avoid ambiguous else clauses.Nathan Binkert
2008-09-10style: Remove non-leading tabs everywhere they shouldn't be. Developers ↵Ali Saidi
should configure their editors to not insert tabs
2008-08-11params: Get rid of the remnants of the old style parameter configuration stuff.Nathan Binkert
2008-08-03Make default PhysicalMemory latency slightly more realistic.Steve Reinhardt
Also update stats to reflect change.
2008-07-15Use ReadResp instead of LoadLockedResp for LoadLockedReq responses.Steve Reinhardt
2008-07-15Add missing newlines to Bus DPRINTFs.Steve Reinhardt
2008-07-01Remove delVirtPort() and make getVirtPort() only return cached version.Ali Saidi
2008-07-01Change everything to use the cached virtPort rather than created their own ↵Ali Saidi
each time. This appears to work, but I don't want to commit it until it gets tested a lot more. I haven't deleted the functionality in this patch that will come later, but one question is how to enforce encourage objects that call getVirtPort() to not cache the virtual port since if the CPU changes out from under them it will be worse than useless. Perhaps a null function like delVirtPort() is still useful in that case.